DISPLAY DEVICE AND METHOD OF CONTROLLING THE SAME
    2.
    发明申请
    DISPLAY DEVICE AND METHOD OF CONTROLLING THE SAME 审中-公开
    显示装置及其控制方法

    公开(公告)号:US20160100119A1

    公开(公告)日:2016-04-07

    申请号:US14809681

    申请日:2015-07-27

    Abstract: A display device and a method of controlling the same. The display device includes a display configured to display an image; and a controller configured to perform image processing on the displayed such that a radius of curvature of the displayed image and a radius of curvature of a visible image are different. The image can be enlarged to a maximum area providing in the display device by applying analogous viewing distance calculation method used in the curved display device with respect to the scaling of the image. Accordingly, the discontinuity of the image can be removed by providing continuous scaling, and the perspective, presence, viewing experience can be enhanced while adaptively correcting the brightness. The display device can display the image having the curvature that the user wants, and thus resemble the curved display device. Further, optical illusion of watching the three-dimensional image can be generated.

    Abstract translation: 一种显示装置及其控制方法。 显示装置包括被配置为显示图像的显示器; 以及控制器,被配置为对显示的图像进行图像处理,使得所显示的图像的曲率半径和可见图像的曲率半径不同。 相对于图像的缩放,通过在曲面显示装置中应用类似的观看距离计算方法,可以将图像放大到提供在显示装置中的最大区域。 因此,可以通过提供连续的缩放来去除图像的不连续性,并且可以在自适应地校正亮度的同时增强透视,存在观看体验。 显示装置可以显示具有用户想要的曲率的图像,因此类似于弯曲的显示装置。 此外,可以产生观看三维图像的视觉错觉。

    ULTRASONIC PROBE AND MANUFACTURING METHOD THEREOF
    3.
    发明申请
    ULTRASONIC PROBE AND MANUFACTURING METHOD THEREOF 有权
    超声探头及其制造方法

    公开(公告)号:US20130147318A1

    公开(公告)日:2013-06-13

    申请号:US13713071

    申请日:2012-12-13

    Inventor: Dong Hyun KIM

    CPC classification number: H01L41/09 G10K11/002 H01L41/31 Y10T29/42

    Abstract: Disclosed herein are an ultrasonic probe having a backing layer formed of a structure which varies acoustic impedance and a manufacturing method thereof. The ultrasonic probe includes a piezoelectric layer and a backing layer provided on a rear surface of the piezoelectric layer, and the backing layer includes a plurality of kerfs formed on a front surface thereof in a lengthwise direction, the front surface being adjacent to the rear surface of the piezoelectric layer, and the kerfs are formed such that the intervals between the kerfs are varied.

    Abstract translation: 这里公开了具有由改变声阻抗的结构形成的背衬层的超声波探头及其制造方法。 超声波探头包括压电层和设置在压电层的后表面上的背衬层,背衬层包括沿其长度方向形成在其前表面上的多个切口,前表面邻近后表面 并且切口形成为使得切口之间的间隔变化。

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20200083222A1

    公开(公告)日:2020-03-12

    申请号:US16410132

    申请日:2019-05-13

    Abstract: A semiconductor device including a substrate having a plurality of active fins, each of the plurality of active fins extending in a first direction, first and second gate structures crossing over the plurality of active fins, the first and second gate structures extending in a second direction different from the first direction, the first and second gate structures spaced apart from each other in the first direction, at least one insulating barrier extending in the first direction and between the plurality of active fins, the insulating barrier separating lower portions of the first and second gate structures from each other, and a gate isolation layer connected to a portion of the insulating barrier, the gate isolation unit separating upper portions of the first and second gate structures from each other may be provided.

    METHOD OF GENERATING LAYOUT AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES USING SAME

    公开(公告)号:US20190131139A1

    公开(公告)日:2019-05-02

    申请号:US15984614

    申请日:2018-05-21

    Abstract: A method of generating a layout and manufacturing a semiconductor device, including receiving a design layout of a semiconductor device including active fins; extracting a design rule of the active fins from the design layout; forming fin lines overlapping the active fins such that the fin lines have a length that is greater than a length of the active fins, wherein the fin lines continuously extend from a position adjacent to one edge of a layout region of the semiconductor device toward another edge, and are formed in an entirety of the layout region of the semiconductor device; forming a mandrel pattern layout in an entirety of the layout region of the semiconductor device, using the fin lines; and forming a cut pattern layout in the entirety of the layout region of the semiconductor device, using the active fins.

    IMAGE SENSOR AND IMAGE PROCESSING DEVICE INCLUDING THE SAME

    公开(公告)号:US20220139993A1

    公开(公告)日:2022-05-05

    申请号:US17507973

    申请日:2021-10-22

    Abstract: An image sensor includes a substrate having an element separation pattern, a first active region, and a ground region, the ground region being separated from the first active region by the element separation pattern, a transfer transistor including a transfer gate electrode on the first active region, the transfer gate electrode being separated from the ground region by the element separation pattern, a photo diode within the substrate, the photo diode being spaced apart from the transfer gate electrode, and a contact on the ground region, the contact being configured to receive a ground voltage.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20230261000A1

    公开(公告)日:2023-08-17

    申请号:US18303884

    申请日:2023-04-20

    CPC classification number: H01L27/0924 H01L29/0653 H01L29/785

    Abstract: A semiconductor device including a substrate having a plurality of active fins, each of the plurality of active fins extending in a first direction, first and second gate structures crossing over the plurality of active fins, the first and second gate structures extending in a second direction different from the first direction, the first and second gate structures spaced apart from each other in the first direction, at least one insulating barrier extending in the first direction and between the plurality of active fins, the insulating barrier separating lower portions of the first and second gate structures from each other, and a gate isolation layer connected to a portion of the insulating barrier, the gate isolation unit separating upper portions of the first and second gate structures from each other may be provided.

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