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    Semiconductor device including integrator and successive approximation register analog-to-digital converter and driving method of the same
    1.
    发明授权
    Semiconductor device including integrator and successive approximation register analog-to-digital converter and driving method of the same 有权

    公开(公告)号：US09800256B2

    公开(公告)日：2017-10-24

    申请号：US15215046

    申请日：2016-07-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Choong-Hoon Lee

    IPC: H03M1/12 ,  H03M1/46

    CPC classification number: H03M1/1245 ,  H03M1/162 ,  H03M1/466

    Abstract: A semiconductor device includes an integrator, a successive approximation register analog-to-digital converter (SAR ADC) and a residue capacitor. The integrator is configured to receive a signal and generate a first analog signal during a first operation mode using a capacitor module comprising one or more capacitors. The SAR ADC is configured to receive the first analog signal, convert the first analog signal into a first digital signal using the capacitor module, and generate a first residue signal in a second operation mode. The residue capacitor is connected to the capacitor module in parallel, and is configured to receive the first residue signal in the second operation mode and provide the first residue signal to the integrator in the first operation mode.

    Fingerprint sensors and electronic devices having the same
    2.
    发明授权
    Fingerprint sensors and electronic devices having the same 有权

    公开(公告)号：US09916490B2

    公开(公告)日：2018-03-13

    申请号：US15067506

    申请日：2016-03-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Choong-Hoon Lee

    IPC: G06K9/00 ,  H03M1/10 ,  H03M1/12

    CPC classification number: G06K9/0002 ,  H03M1/1023 ,  H03M1/124

    Abstract: A fingerprint sensor includes a pixel array, an offset cancellation circuit, a correlated double sampling and integration circuit, a sample and hold circuit, and an analog-to-digital converter. The pixel array includes unit pixels arranged in rows and columns, each of which generates an analog signal by detecting a fingerprint of a user. The offset cancellation circuit receives the analog signal from the unit pixels through a plurality of column lines, and outputs one of the analog signal and an offset cancellation signal as an integration signal based on an offset control signal. The correlated double sampling and integration circuit accumulatively performs a correlated double sampling operation and an integration operation on the integration signal to generate an accumulation signal. The sample and hold circuit samples the accumulation signal based on a hold signal to generate a sampling signal. The analog-to-digital converter converts the sampling signal to a digital signal.

    Apparatus and methods for converting analog signal to N-bit digital data
    3.
    发明授权
    Apparatus and methods for converting analog signal to N-bit digital data 有权
    将模拟信号转换为N位数字数据的装置和方法

    公开(公告)号：US08907834B2

    公开(公告)日：2014-12-09

    申请号：US14101747

    申请日：2013-12-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Choong-Hoon Lee ,  Michael Choi

    IPC: H03M1/38 ,  H03M1/12 ,  H03M1/00 ,  H03M1/06

    CPC classification number: H03M1/38 ,  H03M1/00 ,  H03M1/0695 ,  H03M1/1009 ,  H03M1/12 ,  H03M1/125 ,  H03M1/462

    Abstract: An apparatus includes a sample holding circuit, a comparator, a digital-to-analog converter, a clock generator, a successive approximation logic circuit, and a background calibration circuit. The apparatus converts an analog signal into digital data based on an asynchronous clock signal. The clock signal follows the number of clocks in a converting operation section through a background calibration scheme.

    Abstract translation: 一种装置包括采样保持电路，比较器，数模转换器，时钟发生器，逐次逼近逻辑电路和背景校准电路。 该装置基于异步时钟信号将模拟信号转换成数字数据。 时钟信号通过背景校准方案跟随转换操作部分中的时钟数。

    Fingerprint sensor, electronic device having the same, and method of operating fingerprint sensor
    5.
    发明授权
    Fingerprint sensor, electronic device having the same, and method of operating fingerprint sensor 有权

    公开(公告)号：US09898639B2

    公开(公告)日：2018-02-20

    申请号：US15168241

    申请日：2016-05-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Choong-Hoon Lee

    IPC: G06K9/28 ,  G06K9/00

    CPC classification number: G06K9/0002

    Abstract: A fingerprint sensor, comprising: a pixel array including a plurality of unit pixels arranged in rows and columns, each of the plurality of unit pixels including: a sensing electrode configured to form a detection capacitor; and a signal generation circuit configured to generate an analog signal based on a capacitance of the detection capacitor; and a controller configured to control an operation of the pixel array, wherein the controller is configured to electrically connect sensing electrodes of at least two unit pixels adjacent to each other and activate only one of the signal generation circuits included in the at least two unit pixels to generate the analog signal.

    FINGERPRINT SENSORS AND ELECTRONIC DEVICES HAVING THE SAME
    6.
    发明申请
    FINGERPRINT SENSORS AND ELECTRONIC DEVICES HAVING THE SAME 有权
    指纹传感器和具有该传感器的电子设备

    公开(公告)号：US20170046551A1

    公开(公告)日：2017-02-16

    申请号：US15067506

    申请日：2016-03-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Choong-Hoon Lee

    IPC: G06K9/00 ,  H03M1/12 ,  H03M1/10

    CPC classification number: G06K9/0002 ,  H03M1/1023 ,  H03M1/124

    Abstract: A fingerprint sensor includes a pixel array, an offset cancellation circuit, a correlated double sampling and integration circuit, a sample and hold circuit, and an analog-to-digital converter. The pixel array includes unit pixels arranged in rows and columns, each of which generates an analog signal by detecting a fingerprint of a user. The offset cancellation circuit receives the analog signal from the unit pixels through a plurality of column lines, and outputs one of the analog signal and an offset cancellation signal as an integration signal based on an offset control signal. The correlated double sampling and integration circuit accumulatively performs a correlated double sampling operation and an integration operation on the integration signal to generate an accumulation signal. The sample and hold circuit samples the accumulation signal based on a hold signal to generate a sampling signal. The analog-to-digital converter converts the sampling signal to a digital signal.

    Abstract translation: 指纹传感器包括像素阵列，偏移消除电路，相关双采样和积分电路，采样和保持电路以及模数转换器。 像素阵列包括排列成行和列的单位像素，每个像素通过检测用户的指纹来生成模拟信号。 偏移消除电路通过多条列线从单位像素接收模拟信号，并且基于偏移控制信号输出模拟信号和偏移消除信号之一作为积分信号。 相关的双采样和积分电路累积执行相关的双采样操作和对积分信号的积分运算以产生累积信号。 采样和保持电路基于保持信号对累加信号进行采样，以产生采样信号。 模数转换器将采样信号转换为数字信号。

    Successive approximation analog-to-digital converter and method of analog-to-digital conversion
    7.
    发明授权
    Successive approximation analog-to-digital converter and method of analog-to-digital conversion 有权
    逐次逼近模数转换器和模数转换方法

    公开(公告)号：US09106243B2

    公开(公告)日：2015-08-11

    申请号：US14451080

    申请日：2014-08-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Choong-Hoon Lee ,  Michael Choi

    IPC: H03M1/12 ,  H03M1/06 ,  H03M1/00

    CPC classification number: H03M1/0617 ,  H03M1/001 ,  H03M1/002 ,  H03M1/1023 ,  H03M1/1245 ,  H03M1/468

    Abstract: An analog-to-digital converter includes a digital-to-analog converting circuit, a comparator, a comparator offset detector, and a signal processing circuit. The digital-to-analog converting circuit generates a reference voltage signal that changes in response to a comparator offset compensation signal, samples and holds an analog input signal, and performs a digital-to-analog conversion on digital output data to generate a hold voltage signal. The comparator compares the hold voltage signal with the reference voltage signal in response to a clock signal to generate a comparison output voltage signal. The comparator offset detector generates the comparator offset compensation signal based on the comparison output voltage signal. The signal processing circuit performs successive approximation based on the comparison output voltage signal to generate the digital output data.

    Abstract translation: 模数转换器包括数模转换电路，比较器，比较器偏移检测器和信号处理电路。 数模转换电路产生响应于比较器偏移补偿信号而改变的参考电压信号，采样并保持模拟输入信号，并对数字输出数据执行数模转换以产生保持电压 信号。 比较器响应于时钟信号将保持电压信号与参考电压信号进行比较，以产生比较输出电压信号。 比较器偏移检测器根据比较输出电压信号产生比较器偏移补偿信号。 信号处理电路基于比较输出电压信号进行逐次逼近以产生数字输出数据。

    PROGRAMMABLE GAIN AMPLIFIERS WITH OFFSET COMPENSATION AND TOUCH SENSOR CONTROLLER INCORPORATING THE SAME
    9.
    发明申请
    PROGRAMMABLE GAIN AMPLIFIERS WITH OFFSET COMPENSATION AND TOUCH SENSOR CONTROLLER INCORPORATING THE SAME 审中-公开
    具有偏移补偿的可编程增益放大器和兼容其的触摸传感器控制器

    公开(公告)号：US20160034094A1

    公开(公告)日：2016-02-04

    申请号：US14807530

    申请日：2015-07-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sang-Hyub Kang ,  Ki-Duk Kim ,  Jun-Chul Park ,  Ho-Jin Park ,  Kyung-Hoon Lee ,  Min-Chul Lee ,  Jin-Chul Lee ,  Choong-Hoon Lee ,  Michael Choi ,  Yoon-Kyung Choi

    IPC: G06F3/041 ,  H03F3/45 ,  H03G3/00

    CPC classification number: G06F3/0416 ,  H03F3/45475 ,  H03F3/45968 ,  H03F2200/228 ,  H03F2203/45116 ,  H03F2203/45522 ,  H03F2203/45591 ,  H03G1/0088

    Abstract: A programmable gain amplifier (PGA) circuit includes a first input resistor coupled between a first input node and a first summing node and a second input resistor coupled between a second input node and a second summing node. The PGA circuit further includes a first variable reference resistor coupled between a third input node and the first summing node, a second variable reference resistor coupled between a fourth input node and the second summing node, and an operational amplifier having first and second inputs coupled to respective ones of the first and second summing nodes and first and second outputs coupled to respective ones of the first and second output nodes. At least of the first and second reference resistors may include an R-2R ladder circuit.

    Abstract translation: 可编程增益放大器（PGA）电路包括耦合在第一输入节点和第一求和节点之间的第一输入电阻器以及耦合在第二输入节点和第二求和节点之间的第二输入电阻器。 PGA电路还包括耦合在第三输入节点和第一求和节点之间的第一可变参考电阻器，耦合在第四输入节点和第二求和节点之间的第二可变参考电阻器，以及运算放大器，其具有耦合到 第一和第二求和节点中的相应的，以及耦合到第一和第二输出节点中的相应的第一和第二输出节点的第一和第二输出。 至少第一和第二参考电阻器可以包括R-2R梯形电路。

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