Abstract:
A programmable gain amplifier (PGA) circuit includes a first input resistor coupled between a first input node and a first summing node and a second input resistor coupled between a second input node and a second summing node. The PGA circuit further includes a first variable reference resistor coupled between a third input node and the first summing node, a second variable reference resistor coupled between a fourth input node and the second summing node, and an operational amplifier having first and second inputs coupled to respective ones of the first and second summing nodes and first and second outputs coupled to respective ones of the first and second output nodes. At least of the first and second reference resistors may include an R-2R ladder circuit.