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公开(公告)号：US20190188078A1
公开(公告)日：2019-06-20
申请号：US16057855
申请日：2018-08-08
发明人： GEUNYEONG YU , BOHWAN JUN , KIJUN LEE , JUNJIN KONG , HONG-RAK SON
CPC分类号： G06F11/1076 , H03M13/1105 , H03M13/1154 , H03M13/3972 , H03M13/616
摘要： A method of operating a memory controller that performs decoding by using a parity check matrix corresponding to a convolution-type low density parity check (LDPC) code includes receiving a codeword from at least one memory device, the codeword including a first sub-codeword and a second sub-codeword; decoding a first sub-codeword into first data by using first sliding windows in a first direction, set based on a first sub-matrix included in the parity check matrix and associated with the first sub-codeword; and decoding a second sub-codeword into second data by using second sliding windows in a second direction, set based on a second sub-matrix included in the parity check matrix and associated with the second sub-codeword.
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公开(公告)号：US20240106462A1
公开(公告)日：2024-03-28
申请号：US18141103
申请日：2023-04-28
发明人： Dae-Yeol Yang , BOHWAN JUN , HONG RAK SON , GEUNYEONG YU , YOUNGJUN HWANG
CPC分类号： H03M13/1111 , H03M13/611
摘要： a G-LDPC decoder is provided. The G-LDPC decoder includes: a generalized check node decoder configured to, in each of a plurality of iterations: group connected variable nodes into groups, the connected variable nodes being connected to an mth generalized check node among generalized check nodes; generate test patterns in each of one or more of the groups based on a first message received by the mth generalized check node from the connected variable nodes; and identify a value of a second message to be provided from the mth generalized check node to the connected variable nodes based on the test patterns; and a LDPC decoder circuitry configured to, in each of the iterations, update a value of an nth variable node, among the variable nodes, based on the second message received by the nth variable node from a generalized check node that is connected to the nth variable node.
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公开(公告)号：US20210265005A1
公开(公告)日：2021-08-26
申请号：US17317506
申请日：2021-05-11
发明人： MINUK KIM , BOHWAN JUN , HONG RAK SON , DONG-MIN SHIN , KIJUN LEE
摘要： An operating method of a memory controller that individually controls a plurality of memory units includes reading respective segments from the plurality of memory units based on a plurality of control signals; generating an output codeword based on the segments; performing error correction decoding on the output codeword; when a result of the error correction decoding indicates success, updating at least one of a plurality of accumulated error pattern information respectively corresponding to the plurality of memory units based on the result of the error correction decoding; and when the result of the error correction decoding indicates failure, regulating at least one of the plurality of control signals based on at least one of the plurality of accumulated error pattern information.
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公开(公告)号：US20210202012A1
公开(公告)日：2021-07-01
申请号：US16990262
申请日：2020-08-11
发明人： HYUNSEUNG HAN , SEONGHYEOG CHOI , YOUNGSUK RA , HONG RAK SON , TAEHYUN SONG , BOHWAN JUN
摘要： A storage device includes a nonvolatile memory device and a memory controller. The memory controller receives first data from the nonvolatile memory device based on a first read command, and performs error correction on the first data. When the error correction fails, the memory controller transmits a second read command and second read voltage information to the nonvolatile memory device, receives second data from the nonvolatile memory device, transmits a third read command and third read voltage information to the nonvolatile memory device, and receives third data from the nonvolatile memory device. The memory controller adjusts an offset based on the second data and the third data, transmits a fourth read command, fourth read voltage information, and the offset to the nonvolatile memory device, receives fourth data from the nonvolatile memory device, and performs a soft decision process based on the fourth data.
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公开(公告)号：US20200050513A1
公开(公告)日：2020-02-13
申请号：US16357431
申请日：2019-03-19
发明人： MINUK KIM , BOHWAN JUN , HONG RAK SON , DONG-MIN SHIN , KIJUN LEE
摘要： An operating method of a memory controller that individually controls a plurality of memory units includes reading respective segments from the plurality of memory units based on a plurality of control signals; generating an output codeword based on the segments; performing error correction decoding on the output codeword; when a result of the error correction decoding indicates success, updating at least one of a plurality of accumulated error pattern information respectively corresponding to the plurality of memory units based on the result of the error correction decoding; and when the result of the error correction decoding indicates failure, regulating at least one of the plurality of control signals based on at least one of the plurality of accumulated error pattern information.
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