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公开(公告)号：US09865208B2
公开(公告)日：2018-01-09
申请号：US15189529
申请日：2016-06-22
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Eui Myeong Cho , Jang Hoon Kwak , Yun Mi Kim , Eun Kyung Kim , Hee Jeong Seo , Ki Hyun Pyun
CPC classification number: G09G3/3614 , G09G3/3677 , G09G2310/0202 , G09G2310/0245 , G09G2310/04 , G09G2310/061 , G09G2340/0442
Abstract: A liquid crystal display device is provided as follows. A display panel having a first aspect ratio includes pixels, scan lines and data lines. The pixels are arranged at intersections of the scanning lines and the data lines. A display panel driver, in a partial mode in which an image having a second aspect ratio different from the first aspect ratio is displayed on a partial region of the display panel for two or more frame periods, supplies scan signals only to a first number of scan lines electrically connected to pixels of the partial region for a first type frame period of the two or more frame periods, and supplies scan signals to the plurality of scan lines for a second type frame period of the two or more frame periods.
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公开(公告)号：US09966048B2
公开(公告)日：2018-05-08
申请号：US14660648
申请日：2015-03-17
Applicant: Samsung Display Co., Ltd.
Inventor： Yun Mi Kim , Ki Hyun Pyun , Sung Jun Kim , Min Young Park , Jeong Doo Lee , Kyung Hwa Lim
CPC classification number: G09G5/395 , G09G3/3648 , G09G5/12 , G09G5/393 , G09G2330/021 , G09G2360/12 , G11C7/16 , G11C16/08 , G11C16/10 , G11C16/26 , H03M1/66
Abstract: A memory is provided, which comprises an electrically erasable and programmable read only memory (EEPROM) configured to store an operation system and to be rewritable in response to a write operation signal, an address comparator configured to be connected to Inter Integrated Circuit (I2C) lines and output the write operation signal to the EEPROM in response to an external signal, a digital-to-analog converter (DAC) unit configured to determine whether to connect a DAC resistor and the I2C lines in response to the external signal and a pull-up resistor unit configured to be connected to the I2C lines.
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3.发明申请公开(公告)号：US20170032753A1
公开(公告)日：2017-02-02
申请号：US15170783
申请日：2016-06-01
Applicant: Samsung Display Co., Ltd.
Inventor： Yun Mi Kim , Ki Hyun Pyun , Jang Hoon Kwak , Jong Young Yun , Eui Myeong Cho
CPC classification number: G05F1/462 , G05F1/575 , G09G3/3696 , G09G2330/00
Abstract: A power supply of the present disclosure includes: a power generator that generates a first driving voltage to be supplied to a timing controller; and a voltage compensator that performs feedback of the first driving voltage and generates a feedback voltage according to a voltage difference between the first driving voltage and a first reference voltage supplied from the power generator. In this structure, the power generator generates a second driving voltage by boosting or dropping the first driving voltage to correspond to the feedback voltage, and may supply the second driving voltage to the timing controller.
Abstract translation: 本公开的电源包括：发电机，其产生要提供给定时控制器的第一驱动电压; 以及电压补偿器，其执行第一驱动电压的反馈，并根据第一驱动电压和从发电机提供的第一参考电压之间的电压差产生反馈电压。 在这种结构中，发电机通过升高或降低第一驱动电压来产生对应于反馈电压的第二驱动电压，并且可以将第二驱动电压提供给定时控制器。
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公开(公告)号：US09449545B2
公开(公告)日：2016-09-20
申请号：US14161521
申请日：2014-01-22
Applicant: Samsung Display Co., Ltd.
Inventor： Ki Hyun Pyun , Yun Mi Kim , Min Young Park , Sung-Jun Kim , Ju Hyun Kim , Yong Jae Lee , Kyung-Hwa Lim
CPC classification number: G09G3/2074 , G09G3/3614 , G09G3/3677 , G09G2310/0289 , G09G2320/0252
Abstract: A method of reducing a time for switching a gate line driving signal of display device having plural gate lines from a level that is less than a full gate-on level to the gate-on level is disclosed. The method may include: during a gate line pre-charging period of a respective gate line, causing the gate line driving signal to be at the full gate-on level; during a corresponding gate line main-charging period that follows the pre-charging period, causing the gate line driving signal of to be at the full gate-on level; and during an interposed period that is interposed between the gate line pre-charging period and its corresponding gate line main-charging period, causing the gate line driving signal to be at an intermediate level that is between the full gate-on level and an opposed gate-off level.
Abstract translation: 公开了一种减少将具有多个栅极线的显示装置的栅极线驱动信号从小于全栅极导通电平的电平切换到栅极导通电平的方法。 该方法可以包括：在相应栅极线的栅极线预充电周期期间，使栅极线驱动信号处于完全栅极导通电平; 在预充电周期之后的相应的栅极线主充电期间，使栅极线驱动信号处于全栅极导通电平; 并且在插入在栅极线预充电周期与其对应的栅极线主充电周期之间的插入时段期间，使栅极线驱动信号处于处于完全栅极导通电平之间的中间电平， 关门水平
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