DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE

    公开(公告)号:US20250017048A1

    公开(公告)日:2025-01-09

    申请号:US18583738

    申请日:2024-02-21

    Abstract: A display device includes: a light emitting element on a base layer and including a first electrode, a second electrode, and a light emitting part electrically connected between the first electrode and the second electrode; a pixel defining layer on the base layer; a barrier layer on the pixel defining layer; and an electrode on the barrier layer, wherein the first electrode includes a (1_1)-th electrode and a (1_2)-th electrode, the pixel defining layer is between the (1_1)-th electrode and the (1_2)-th electrode, the light emitting part includes a first light emitting part electrically connected to the (1_1)-th electrode and a second light emitting part electrically connected to the (1_2)-th electrode, and the electrode and the barrier layer are between the first light emitting part and the second light emitting part in a plan view.

    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    3.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
    薄膜晶体管阵列及其制造方法

    公开(公告)号:US20160218114A1

    公开(公告)日:2016-07-28

    申请号:US14740484

    申请日:2015-06-16

    CPC classification number: H01L29/42356 H01L29/42384 H01L29/4908 H01L29/7869

    Abstract: A thin film transistor array panel includes: a gate line on a substrate and including a gate electrode; a first gate insulating layer on the substrate and the gate line, the first gate insulting layer including a first portion adjacent to the gate line and a second portion overlapping the gate line and having a smaller thickness than that of the first portion; a second gate insulating layer on the first gate insulating layer; a semiconductor layer on the second gate insulating layer; a source electrode and a drain electrode spaced apart from each other on the semiconductor layer; a passivation layer on the second gate insulating layer, the source electrode and the drain electrode; and a pixel electrode on the passivation layer and connected with the drain electrode. The first gate insulating layer and the second gate insulating layer have stress in opposite directions from each other.

    Abstract translation: 薄膜晶体管阵列面板包括:基板上的栅极线,并包括栅电极; 所述第一栅极绝缘层在所述基板和所述栅极线上,所述第一栅极绝缘层包括与所述栅极线相邻的第一部分和与所述栅极线重叠并且具有比所述第一部分的厚度小的第二部分; 第一栅极绝缘层上的第二栅极绝缘层; 在所述第二栅极绝缘层上的半导体层; 在半导体层上彼此隔开的源电极和漏电极; 第二栅极绝缘层上的钝化层,源电极和漏电极; 以及钝化层上的像素电极并与漏电极连接。 第一栅极绝缘层和第二栅极绝缘层在彼此相反的方向上具有应力。

    DEPOSITION MASK AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20250101567A1

    公开(公告)日:2025-03-27

    申请号:US18734300

    申请日:2024-06-05

    Abstract: A method of fabricating a mask includes defining cell areas and a mask frame area on a silicon substrate, the mask frame area excluding the cell areas, the mask frame area may include a mask rib region partitioning the cell areas and an outer frame region disposed at an outermost position of the silicon substrate, forming a groove in the mask rib region, forming a metal mask rib by forming a metal in the groove, forming a photoresist pattern including openings in each of the cell areas, growing a plating film in each of the cell areas, forming a mask membrane formed of the plating film by removing the photoresist pattern, and etching a rear surface of the silicon substrate to form cell openings associated with the cell areas, respectively.

Patent Agency Ranking