Display substrate including a thin film transistor and method of manufacturing the same
    2.
    发明授权
    Display substrate including a thin film transistor and method of manufacturing the same 有权
    包括薄膜晶体管的显示基板及其制造方法

    公开(公告)号:US09184181B2

    公开(公告)日:2015-11-10

    申请号:US14454822

    申请日:2014-08-08

    Abstract: A display substrate includes a gate electrode on a base substrate, an active pattern which overlaps the gate electrode and includes a metal oxide semiconductor, an insulation pattern on the active pattern, a source electrode which contacts the active pattern, a drain electrode which contacts the active pattern and is spaced apart from the source electrode, and a first passivation layer which covers the active pattern and the insulation pattern, and includes fluorine, where the active pattern includes a first portion which directly contacts the insulation pattern and overlaps the gate electrode and the insulation pattern, a second portion which contacts the first passivation layer and has an electrical conductivity substantially larger than that of the first portion, a third portion which contacts the first passivation layer, has an electrical conductivity substantially larger than that of the first portion and is spaced apart from the second portion.

    Abstract translation: 显示基板包括在基底基板上的栅极电极,与栅电极重叠并且包括金属氧化物半导体的有源图案,有源图案上的绝缘图案,与有源图案接触的源极电极, 并且与源电极间隔开,以及覆盖有源图案和绝缘图案并包括氟的第一钝化层,其中有源图案包括直接接触绝缘图案并与栅电极重叠的第一部分,以及 所述绝缘图案是接触所述第一钝化层并具有比所述第一部分的导电性大的电导率的第二部分,与所述第一钝化层接触的第三部分具有比所述第一部分的电导率大的电导率, 与第二部分间隔开。

    Thin film transistor substrate and method of manufacturing the same
    3.
    发明授权
    Thin film transistor substrate and method of manufacturing the same 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号:US09236455B2

    公开(公告)日:2016-01-12

    申请号:US14081160

    申请日:2013-11-15

    Abstract: A thin film transistor substrate includes an active pattern which is disposed on a base substrate and includes a channel, a source electrode and a drain electrode, the channel which includes an oxide semiconductor, the source electrode and the drain electrode connected the channel, a gate electrode overlapped with the channel, a passivation layer which covers the source electrode, the drain electrode and the gate electrode and a fluorine deposition layer disposed between the active pattern and the passivation layer.

    Abstract translation: 薄膜晶体管基板包括设置在基底基板上并包括沟道,源电极和漏电极的有源图案,所述沟道包括氧化物半导体,源极和与漏极连接的沟道,栅极 电极与沟道重叠,覆盖源电极,漏极和栅电极的钝化层和布置在活性图案和钝化层之间的氟沉积层。

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