公开(公告)号：US20240332250A1

公开(公告)日：2024-10-03

申请号：US18615039

申请日：2024-03-25

Applicant: STMicroelectronics International N.V.

Inventor： Antonio BELLIZZI ,  Guendalina CATALANO

IPC: H01L23/00 ,  H01L23/495

CPC classification number: H01L24/97 ,  H01L23/49548 ,  H01L24/27 ,  H01L24/29 ,  H01L24/98 ,  H01L2224/2746 ,  H01L2224/29111 ,  H01L2224/97 ,  H01L2224/98 ,  H01L2924/301

Abstract: Semiconductor chips are arranged on a first surface of a common electrically conductive substrate having an opposite second surface. The substrate includes adjacent substrate portions having mutually facing sides with sacrificial connecting bars extending between adjacent mutually facing sides. A solderable metallic layer is present on the second surface extending over the sacrificial connecting bars. The solderable metallic layer is selectively removed (by laser ablation or etching, for example) from at least part of the length the sacrificial connecting bars. The common electrically conductive substrate is then cut along the length of the elongate sacrificial connecting bars to provide singulated individual semiconductor devices. Undesired formation of electrically conductive filaments or flakes bridging parts of the substrate intended to be mutually isolated is countered.

公开(公告)号：US20250125228A1

公开(公告)日：2025-04-17

申请号：US18910661

申请日：2024-10-09

Applicant: STMicroelectronics International N.V.

Inventor： Guendalina CATALANO ,  Alessandro MELLINA GOTTARDO ,  Alberto ARRIGONI

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor die is arranged at a die mounting region at a first surface of a die pad in a substrate. The die pad has a second surface opposite the first surface. Laser beam energy is applied to the second surface of the die pad to form in the second surface of the die pad a recessed peripheral portion surrounding a central portion opposite the die mounting region at the first surface. An encapsulation of electrically insulating material is molded onto the substrate. During molding, the electrically insulating material covers the recessed peripheral portion and leakage of the electrically insulating material over the central portion is countered in response to the peripheral portion of the second surface of the die pad being recessed.

公开(公告)号：US20250157982A1

公开(公告)日：2025-05-15

申请号：US18944300

申请日：2024-11-12

Applicant: STMicroelectronics International N.V.

Inventor： Guendalina CATALANO ,  Oscar DI MAURO

IPC: H01L23/00 ,  H01L21/48 ,  H01L23/495

Abstract: A semiconductor die is arranged at a mounting surface of a substrate via electrically conductive pillars protruding from the semiconductor die with distal ends of the electrically conductive pillars in electrical contact with the mounting surface of the substrate. The substrate has, at the mounting surface, two or more alignment bushings configured to have inserted therein respective electrically conductive pillars. Selected ones of the electrically conductive pillars protruding from the semiconductor die are inserted into the two or more alignment bushings at the mounting surface of the substrate. The pillars inserted into the alignment bushings counter movement of the semiconductor die with respect to the substrate.

公开(公告)号：US20240332238A1

公开(公告)日：2024-10-03

申请号：US18615286

申请日：2024-03-25

Applicant: STMicroelectronics International N.V.

Inventor： Guendalina CATALANO ,  Antonio BELLIZZI ,  Claudio ZAFFERONI

IPC: H01L23/00

CPC classification number: H01L24/19 ,  H01L24/24 ,  H01L2224/19 ,  H01L2224/24245 ,  H01L2924/18162

Abstract: Laser direct structure (LDS) material is molded onto a semiconductor chip arranged on a substrate. The LDS material has a first thickness between a front surface of the LDS material and the substrate. A portion of the LDS material is removed (with a blade, for instance) to form a cavity having an end wall between the front surface of the LDS material and an electrically conductive formation on the substrate. At the cavity, the LDS material has a second thick ness smaller than the first thickness. Laser beam energy is applied to the LDS material at the end wall of the cavity to structure therein one or more vias that extend between the end wall of the cavity and the electrically conductive formation. The semiconductor chip and the electrically conductive formation are electrically coupled with electrically conductive material grown in the one or more vias laser structured in the LDS material.

公开(公告)号：US20240332033A1

公开(公告)日：2024-10-03

申请号：US18614936

申请日：2024-03-25

Applicant: STMicroelectronics International N.V.

Inventor： Michele DERAI ,  Guendalina CATALANO

IPC: H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L21/561 ,  H01L21/78 ,  H01L23/3171 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/94 ,  H01L24/04 ,  H01L2224/0345 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05147 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/11462 ,  H01L2224/11823 ,  H01L2224/11825 ,  H01L2224/13021 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13582 ,  H01L2224/13583 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/16227 ,  H01L2224/94

Abstract: A “package-less” integrated circuit semiconductor device is produced by laminating first and second insulating films on opposed first and second surfaces of a semiconductor wafer having semiconductor dice integrated therein. Electrically conductive formations towards die pads of the semiconductor dice are provided in vias to the semiconductor wafer opened through the first insulating film laminated on the first surface of the semiconductor wafer. The semiconductor wafer provided with these electrically conductive formations is singulated at separation lines between neighboring semiconductor dice to produce individual semiconductor devices. Each device has: opposed first and second device surfaces having protective portions of the first and second insulating films laminated thereon, and side surfaces extending between the opposed first and second device surfaces, these side surfaces being left uncovered by the first and second insulating films.