公开(公告)号：US20240063196A1

公开(公告)日：2024-02-22

申请号：US17820156

申请日：2022-08-16

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： TaeKeun Lee ,  Hyunil Bae

IPC: H01L25/16 ,  H01L23/552 ,  H01L23/367 ,  H01L23/13 ,  H01L21/48 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L25/165 ,  H01L23/552 ,  H01L23/3675 ,  H01L23/13 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/13 ,  H01L24/32 ,  H01L24/73 ,  H01L2924/3025 ,  H01L2924/1616 ,  H01L2924/16251 ,  H01L2924/16235 ,  H01L2224/13655 ,  H01L2224/13582 ,  H01L2224/1601 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/32225 ,  H01L2224/32265 ,  H01L2224/73204 ,  H01L24/48 ,  H01L2224/48227 ,  H01L25/0657

Abstract: A semiconductor device has a semiconductor die, substrate, and plurality of first conductive pillars formed over the semiconductor die or substrate. Alternatively, the first conductive pillars formed over the semiconductor die and substrate. An electrical component is disposed over the semiconductor die. The electrical component can be a double-sided IPD. The semiconductor die and electrical component are disposed over the substrate. A shielding frame is disposed over the semiconductor die. A plurality of second conductive pillars is formed over a first surface of the electrical component. A plurality of third conductive pillars is formed over a second surface of the electrical component opposite the first surface of the electrical component. A bump cap can be formed over a distal end of the conductive pillars. The substrate has a cavity and the electrical component is disposed within the cavity. An underfill material is deposited between the semiconductor die and substrate.