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Patent Agency Ranking
公开(公告)号：US10945080B2
公开(公告)日：2021-03-09
申请号：US15355822
申请日：2016-11-18
Applicant: STAGES PCS, LLC
Abstract: An audio analysis and processing system with a processor configured with an audio array input thread connected to a plurality of audio input channels each corresponding to an audio input sensor. An audio input sensor may be positionally related to a position of other audio input sensors and a source input thread may be configured to be connected to a microphone audio input channel. An audio output thread may be configured to be connected to a speaker output channel and a beamformer thread may be responsive to the audio array input thread. A beam analysis and selection thread may be connected to an output of the beamformer thread and a mixer thread may have a first input connected to an output of the source input thread and a second input connected to an output of the beam analysis and selection thread and may have an output connected to the audio output thread. The audio input channel may be connected to the personal communication device. The microphone audio input channel may be connected to the personal communication device. The processor may include a line output thread configured to connect to an audio output channel. An audio information interface may be provided to connect signals representing audio to the processor.
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公开(公告)号：US20180146306A1
公开(公告)日：2018-05-24
申请号：US15355822
申请日：2016-11-18
Applicant: STAGES PCS, LLC
CPC classification number: H04R25/407 , G06F3/165 , H04R25/43 , H04R25/554 , H04R2225/43 , H04W4/80
Abstract: An audio analysis and processing system with a processor configured with an audio array input thread connected to a plurality of audio input channels each corresponding to an audio input sensor. An audio input sensor may be positionally related to a position of other audio input sensors and a source input thread may be configured to be connected to a microphone audio input channel. An audio output thread may be configured to be connected to a speaker output channel and a beamformer thread may be responsive to the audio array input thread. A beam analysis and selection thread may be connected to an output of the beamformer thread and a mixer thread may have a first input connected to an output of the source input thread and a second input connected to an output of the beam analysis and selection thread and may have an output connected to the audio output thread. The audio input channel may be connected to the personal communication device. The microphone audio input channel may be connected to the personal communication device. The processor may include a line output thread configured to connect to an audio output channel. An audio information interface may be provided to connect signals representing audio to the processor.
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公开(公告)号：US20180146285A1
公开(公告)日：2018-05-24
申请号：US15355913
申请日：2016-11-18
Applicant: STAGES PCS, LLC
CPC classification number: H04R3/005 , H04R1/406 , H04R2201/401 , H04R2430/20 , H04S7/303
Abstract: A microphone array may include a microcontroller having a plurality of ports, a plurality of microphones connected to the ports, and a position sensor connected to a port of the microcontroller. The microcontroller may be responsive to a clock signal and the microcontroller may include a data output as a universal serial bus output. Two microphones may be connected to a single port of the microcontroller. The microphones may be equally spaced around the circumference of the circle. The microphones may be located in a known relative position to one or more other microphones of the microphone array. The microphone array may be positioned in a fixed relative position to the position sensor. The microphones may be connected to an I2S port of the microcontroller. A position sensor may be connected to the microcontroller at an I2C port. Traces connecting the microphones to the microcontroller may be substantially equal in length. The microphones may have a digital input. The microcontroller may be connected to eight microphones. The microcontroller may be configured to output 1 millisecond frames. The microcontroller may be configured to read data from the microphones and the position sensor and generate an output comprising eight audio segments each 16 bits in length and a data segment up to 32 bits in length representing at least a portion of data output from the position sensor.
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公开(公告)号：US20180146284A1
公开(公告)日：2018-05-24
申请号：US15355865
申请日：2016-11-18
Applicant: STAGES PCS, LLC
CPC classification number: H04R25/407 , H04R2430/21
Abstract: A beamforming apparatus may have a domain conversion stage converting a plurality of time domain signals representing audio information to a plurality of frequency domain signals representing said audio information, a bandpass filter stage having a plurality of inputs connected to the frequency domain signals and having a plurality of outputs. A beamformer filter stage may have a plurality of inputs corresponding to the of outputs of the bandpass filter stage and a plurality of outputs. An inverse domain conversion stage, converting a plurality of inputs corresponding to outputs of the beamformer filter stage from frequency domain signals to time domain signals and having a plurality of outputs connected to an output stage.
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公开(公告)号：US09980042B1
公开(公告)日：2018-05-22
申请号：US15355865
申请日：2016-11-18
Applicant: STAGES PCS, LLC
CPC classification number: H04R25/407 , H04R2430/21
Abstract: A beamforming apparatus may have a domain conversion stage converting a plurality of time domain signals representing audio information to a plurality of frequency domain signals representing said audio information, a bandpass filter stage having a plurality of inputs connected to the frequency domain signals and having a plurality of outputs. A beamformer filter stage may have a plurality of inputs corresponding to the of outputs of the bandpass filter stage and a plurality of outputs. An inverse domain conversion stage, converting a plurality of inputs corresponding to outputs of the beamformer filter stage from frequency domain signals to time domain signals and having a plurality of outputs connected to an output stage.
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