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公开(公告)号:US20230014905A1
公开(公告)日:2023-01-19
申请号:US17757182
申请日:2020-10-29
IPC分类号: H01L21/768 , H01L27/088 , H01L29/423 , H01L21/67
摘要: The on-resistance of each of field effect transistors having different planar sizes is reduced. A semiconductor device includes first and second field effect transistors mounted on a semiconductor substrate and an insulating layer provided on a main surface of the semiconductor substrate. Here, each of the first and second field effect transistors includes a pair of main electrodes which are separated from each other and provided on the main surface of the semiconductor substrate, a cavity part which is provided in the insulating layer between the pair of main electrodes, and a gate electrode which has a head part positioned on the insulating layer and a body part that penetrates the insulating layer from the head part and protrudes toward the cavity part and in which the head part is wider than the body part. Here, the width of the cavity part of the second field effect transistor is different from the width of the cavity part of the first field effect transistor.
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公开(公告)号:US20220352362A1
公开(公告)日:2022-11-03
申请号:US17755639
申请日:2020-10-15
发明人: KATSUHIKO TAKEUCHI
IPC分类号: H01L29/778 , H01L49/02 , H01L27/06
摘要: A semiconductor device includes: a semiconductor material layer forming a channel layer; a pair of source/drain electrodes formed on the semiconductor material layer; and a gate electrode arranged between the pair of source/drain electrodes and formed on the semiconductor material layer, at least one of the pair of source/drain electrodes and the gate electrode being connected via a resistive element.
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公开(公告)号:US20230282721A1
公开(公告)日:2023-09-07
申请号:US18006622
申请日:2021-05-26
IPC分类号: H01L29/423 , H01L29/51 , H01L29/66 , H01L29/778 , H01L29/40
CPC分类号: H01L29/42368 , H01L29/401 , H01L29/42376 , H01L29/512 , H01L29/513 , H01L29/517 , H01L29/66462 , H01L29/778 , H01L29/2003
摘要: Fluctuation and deterioration of characteristics of a semiconductor device are reduced. The semiconductor device includes a field effect transistor mounted on a semiconductor base. In addition, the field effect transistor includes an insulation layer that includes a first insulation film provided on a main surface of the semiconductor base, and a second insulation film provided on the first insulation film and having etching selectivity higher than etching selectivity of the first insulation film, a gate electrode that has a head part located on the insulation layer and a body part extending from the head part toward the main surface of the semiconductor base and is configured such that the head part has a width larger than a width of the body part, and an embedded film provided between the first insulation film and the body part of the gate electrode in a gate length direction of the gate electrode, and having a relative permittivity equal to or higher than a relative permittivity of the second insulation film.
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公开(公告)号:US20230178612A1
公开(公告)日:2023-06-08
申请号:US17999091
申请日:2021-03-31
发明人: KATSUHIKO TAKEUCHI
IPC分类号: H01L29/423 , H01L29/06 , H01L29/40 , H01L29/417 , H01L29/08 , H01L29/10 , H01L29/66 , H01L29/778 , H01L29/45
CPC分类号: H01L29/423 , H01L29/0692 , H01L29/405 , H01L29/41758 , H01L29/42316 , H01L29/08 , H01L29/10 , H01L29/401 , H01L29/66462 , H01L29/7786 , H01L29/452 , H01L23/3171
摘要: A semiconductor unit includes: a barrier layer including a first compound semiconductor; a channel layer including a second compound semiconductor, and bonded to the barrier layer at a first face; an insulation layer provided on a second face, of the barrier layer, that is on an opposite side of the first face, and having an opening section that exposes the barrier layer; a gate electrode provided to bury the opening section; a source electrode and a drain electrode that are provided on the second face of the barrier layer on both sides of the gate electrode with the gate electrode being interposed; and a material layer including a metal material or a semiconductor material, and provided in contact with the second face of the barrier layer between the gate electrode and the drain electrode.
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公开(公告)号:US20220399329A1
公开(公告)日:2022-12-15
申请号:US17755355
申请日:2020-10-15
发明人: SHINYA MORITA , KATSUHIKO TAKEUCHI
IPC分类号: H01L27/06 , H01L49/02 , H01L29/778 , H01L29/20
摘要: A semiconductor device includes: a semiconductor material layer forming a channel layer; a pair of source/drain electrodes formed on the semiconductor material layer; and a gate electrode arranged between the pair of source/drain electrodes and formed on the semiconductor material layer via a gate insulating film, wherein a connection path using a capacitor in which an insulating film formed in the same layer as the gate insulating film is sandwiched by a pair of electrodes and that undergoes dielectric breakdown at a voltage lower than a dielectric breakdown voltage of the gate insulating film is formed between at least one of the pair of source/drain electrodes and the gate electrode.
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公开(公告)号:US20240304694A1
公开(公告)日:2024-09-12
申请号:US18575382
申请日:2022-02-15
IPC分类号: H01L29/423 , H01L29/66 , H01L29/778
CPC分类号: H01L29/42368 , H01L29/4236 , H01L29/7786 , H01L29/66462
摘要: A semiconductor device (1) includes an insulated-gate field-effect transistor (2) that includes: a channel layer (21); a pair of main electrodes (24(s), 24(D)) spaced from each other and provided on the channel layer; a barrier layer (22) provided on the channel layer between the pair of main electrodes and including a recessed region (22A) that goes through the barrier layer in a thickness direction; a gate insulating film (25A, 25B) provided on the channel layer in the recessed region and having two or more kinds of thicknesses; and a gate electrode (26) provided on the channel layer through the gate insulating film.
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公开(公告)号:US20230261099A1
公开(公告)日:2023-08-17
申请号:US18005058
申请日:2021-06-18
发明人: KAZUKI KISHIDA , KATSUHIKO TAKEUCHI
IPC分类号: H01L29/778 , H01L29/10 , H01L29/66 , H01L29/423
CPC分类号: H01L29/7786 , H01L29/1045 , H01L29/42364 , H01L29/66462 , H01L29/2003
摘要: A semiconductor device including: a channel layer; a barrier layer; a source electrode and a drain electrode; a gate electrode; a side surface opening region; and a low-Ns region. The channel layer includes a first nitride semiconductor. The barrier layer includes a second nitride semiconductor. The barrier layer is provided on the channel layer. The source electrode and the drain electrode are provided above the barrier layer. The gate electrode is provided above the barrier layer between the source electrode and the drain electrode. The side surface opening region is at least provided on one of side surfaces of the gate electrode between the source electrode or the drain electrode and the gate electrode. The low-Ns region is provided in the channel layer in correspondence with a planar region provided with the gate electrode and the side surface opening region. The low-Ns region has lower carrier density than carrier density of another region of the channel layer.
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公开(公告)号:US20210111277A1
公开(公告)日:2021-04-15
申请号:US17047453
申请日:2019-03-20
发明人: SATOSHI TANIGUCHI , MASASHI YANAGITA , KATSUHIKO TAKEUCHI , SHIGERU KANEMATSU , TAKANORI HIGASHI
IPC分类号: H01L29/778 , H01L21/28 , H01L21/02 , H01L29/45 , H01L29/49 , H01L29/786 , H01L29/66
摘要: [Overview] [Problem to be Solved] To provide a switching transistor and a semiconductor module having lower distortion generated in a signal. [Solution] A switching transistor including: a channel layer including a compound semiconductor and having sheet electron density equal to or higher than 1.7×1013 cm−2; a barrier layer formed on the channel layer by using a compound semiconductor that is of a different type from the channel layer; a gate electrode provided on the barrier layer; and a source electrode and a drain electrode provided on the barrier layer with the gate electrode interposed between the source electrode and the drain electrode.
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公开(公告)号:US20210043744A1
公开(公告)日:2021-02-11
申请号:US16978043
申请日:2019-02-14
发明人: KATSUHIKO TAKEUCHI
IPC分类号: H01L29/423 , H01L29/778 , H01L29/66
摘要: A semiconductor device including: a semiconductor layer; an inter-layer insulating film having a through hole and a low-dielectric constant region; a gate electrode including an embedded section and a widened section; and a gate insulating film provided between the embedded section of the gate electrode and the semiconductor layer. The through hole is provided to be opposed to the semiconductor layer. The low-dielectric constant region is provided to at least a portion of an area around the through hole. The embedded section is embedded in the through hole of the inter-layer insulating film. The widened section is opposed to the semiconductor layer with the inter-layer insulating film interposed between the widened section and the semiconductor layer and is widened to an area around the embedded section.
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