公开(公告)号：US20180284199A1

公开(公告)日：2018-10-04

申请号：US15841535

申请日：2017-12-14

Applicant: SK hynix Inc. ,  Toshiba Memory Corporation

Inventor： Ku-Youl JUNG ,  Guk-Cheon KIM ,  Toshihiko NAGASE ,  Daisuke WATANABE ,  Won-Joon CHOI ,  Youngmin EEH ,  Kazuya SAWADA

IPC: G01R33/09 ,  H01L27/11 ,  H01L27/108 ,  H01L27/112

CPC classification number: G01R33/093 ,  G01R33/098 ,  G11C11/16 ,  G11C11/161 ,  H01L27/108 ,  H01L27/1104 ,  H01L27/112 ,  H01L27/22

Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; and a tunnel barrier layer between the free layer and the pinned layer, wherein the free layer may include a first magnetic layer; a second magnetic layer having a smaller perpendicular magnetic anisotropy energy density than the first magnetic layer; and a spacer interposed between the first magnetic layer and the second magnetic layer.

公开(公告)号：US20190079873A1

公开(公告)日：2019-03-14

申请号：US16186231

申请日：2018-11-09

Applicant: SK hynix Inc. ,  Toshiba Memory Corporation

Inventor： Yang-Kon KIM ,  Ki-Seon PARK ,  Bo-Mi LEE ,  Won-Joon CHOI ,  Guk-Cheon KIM ,  Daisuke WATANABE ,  Makoto NAGAMINE ,  Young-Min EEH ,  Koji UEDA ,  Toshihiko NAGASE ,  Kazuya SAWADA

IPC: G06F12/0875 ,  H01L43/08 ,  G11C11/16 ,  H01L43/10

Abstract: An electronic device includes semiconductor memory, the semiconductor memory including an under layer; a first magnetic layer located over the under layer and having a variable magnetization direction; a tunnel barrier layer located over the first magnetic layer; and a second magnetic layer located over the tunnel barrier layer and having a pinned magnetization direction, wherein the under layer includes a first metal nitride layer having a NaCl crystal structure and a second metal nitride layer containing a light metal.

公开(公告)号：US20180198060A1

公开(公告)日：2018-07-12

申请号：US15843674

申请日：2017-12-15

Applicant: SK hynix Inc. ,  Toshiba Memory Corporation

Inventor： Yang-Kon KIM ,  Guk-Cheon KIM ,  Jae-Hyoung LEE ,  Jong-Koo LIM ,  Ku-Youl JUNG ,  Toshihiko NAGASE ,  Youngmin EEH

IPC: H01L43/02 ,  H01L27/22 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  G06F3/06 ,  G11C11/16

CPC classification number: H01L43/02 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0679 ,  G11C11/161 ,  G11C11/165 ,  H01F10/30 ,  H01F10/3213 ,  H01F10/3254 ,  H01F10/3286 ,  H01F10/329 ,  H01L27/228 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a pinned magnetization direction; a tunnel barrier layer interposed between the free layer and the pinned layer; and an under layer which is in contact with the free layer and includes a rare earth metal nitride.

公开(公告)号：US20190109280A1

公开(公告)日：2019-04-11

申请号：US16203114

申请日：2018-11-28

Applicant: SK hynix Inc. ,  TOSHIBA MEMORY CORPORATION

Inventor： Jong-Koo LIM ,  Won-Joon CHOI ,  Guk-Cheon KIM ,  Yang-Kon KIM ,  Ku-Youl JUNG ,  Toshihiko NAGASE ,  Youngmin EEH ,  Daisuke WATANABE ,  Kazuya SAWADA ,  Makoto NAGAMINE

IPC: H01L43/08 ,  H01L43/10 ,  H01L43/12

CPC classification number: H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: Provided is a method for fabricating an electronic device including a variable resistance element which includes a free layer formed over a substrate and having a changeable magnetization direction, a pinned layer having a pinned magnetization direction, a tunnel barrier layer interposed between the free layer and the pinned layer, and a magnetic correction layer suitable for reducing the influence of a stray field generated by the pinned layer. The method may include: cooling the substrate; and forming the magnetic correction layer over the cooled substrate.

公开(公告)号：US20170222133A1

公开(公告)日：2017-08-03

申请号：US15187267

申请日：2016-06-20

Applicant: SK hynix Inc. ,  KABUSHIKI KAISHA TOSHIBA

Inventor： Jong-Koo LIM ,  Won-Joon CHOI ,  Guk-Cheon KIM ,  Yang-Kon KIM ,  Ku-Youl JUNG ,  Toshihiko NAGASE ,  Youngmin EEH ,  Daisuke WATANABE ,  Kazuya SAWADA ,  Makoto NAGAMINE

IPC: H01L43/08 ,  H01L43/10 ,  H01L43/12

CPC classification number: H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: Provided are electronic device including a variable resistance element and a method for fabricating an electronic device including a variable resistance element. The electronic device including a variable resistance element includes a free layer formed over a substrate and having a changeable magnetization direction, a pinned layer having a pinned magnetization direction, a tunnel barrier layer interposed between the free layer and the pinned layer, and a magnetic correction layer suitable for reducing the influence of a stray field generated by the pinned layer. The method may include cooling the substrate, before forming the magnetic correction layer such that the magnetic correction layer is formed over the cooled substrate.