公开(公告)号：US20180151561A1

公开(公告)日：2018-05-31

申请号：US15489093

申请日：2017-04-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mirco CANTORO ,  Yeon Cheol HEO ,  Byoung Gi KIM ,  Chang Min YOE ,  Seung Chan YUN ,  Dong Hun LEE ,  Yun Il LEE ,  Hyung Suk LEE

IPC: H01L27/088 ,  H01L29/06 ,  H01L23/50 ,  H01L21/8234

CPC classification number: H01L27/088 ,  B82Y10/00 ,  H01L21/823412 ,  H01L21/823456 ,  H01L21/823487 ,  H01L23/50 ,  H01L29/0676 ,  H01L29/401 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/78642 ,  H01L29/78696 ,  H01L2029/42388

Abstract: A semiconductor device includes a substrate having a first region and a second region; a first nanowire in the first region in a direction perpendicular to an upper surface of the substrate; a second nanowire in the second region in a direction perpendicular to the upper surface of the substrate and having a height less than that of the first nanowire; first source/drain regions at top portion and bottom portion of the first nanowire; second source/drain regions at top portion and bottom portion of the second nanowire; a first gate electrode surrounding the first nanowire between the first source/drain regions; and a second gate electrode surrounding the second nanowire between the second source/drain regions.

公开(公告)号：US20190312124A1

公开(公告)日：2019-10-10

申请号：US16249298

申请日：2019-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun Il LEE ,  Sung II PARK ,  Jae Hyun PARK ,  Hyung Suk LEE

IPC: H01L29/66 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78 ,  H01L21/02 ,  H01L21/8238

Abstract: A semiconductor device including a first fin type pattern and a second fin type pattern which protrude from a substrate and are spaced apart from each other to extend in a first direction, a dummy fin type pattern protruding from the substrate between the first fin type pattern and the second fin type pattern, a first gate structure extending in a second direction intersecting with the first direction, on the first fin type pattern, a second gate structure extending in the second direction, on the second fin type pattern, and a capping pattern extending in the second direction, on the first gate structure and the second gate structure, wherein the capping pattern includes a separation part which is in contact with an upper surface of the dummy fin type pattern, and the dummy fin type pattern and the separation part separate the first gate structure and the second gate structure.

公开(公告)号：US20220085016A1

公开(公告)日：2022-03-17

申请号：US17533212

申请日：2021-11-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joong Gun OH ,  Sung Il PARK ,  Jae Hyun PARK ,  Hyung Suk LEE ,  Eun Sil PARK ,  Yun Il LEE

IPC: H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L21/8238 ,  H01L21/308 ,  H01L29/423 ,  H01L21/768

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.

公开(公告)号：US20250169173A1

公开(公告)日：2025-05-22

申请号：US19035658

申请日：2025-01-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joong Gun OH ,  Sung Il PARK ,  Jae Hyun PARK ,  Hyung Suk LEE ,  Eun Sil PARK ,  Yun Il LEE

IPC: H10D84/85 ,  H01L21/308 ,  H01L21/768 ,  H10D30/01 ,  H10D30/62 ,  H10D62/10 ,  H10D62/13 ,  H10D64/01 ,  H10D64/27 ,  H10D84/01 ,  H10D84/03

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.

公开(公告)号：US20200066856A1

公开(公告)日：2020-02-27

申请号：US16386475

申请日：2019-04-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun Seung SONG ,  Doo Hyun LEE ,  Yun Il LEE ,  Jae Ran JANG

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/78 ,  H01L21/285

Abstract: A semiconductor device and a method of manufacturing a semiconductor device, the semiconductor device including a substrate including an active fin extending in a first direction; a gate structure extending in a second direction to intersect the active fin; a source/drain region on the active fin; a metal silicide layer on the source/drain region; a filling insulating portion on the metal silicide layer, the filling insulating portion having a contact hole connected to a portion of the metal silicide layer; a protective barrier layer between the metal silicide layer and the filing insulating portion; and a contact plug in the contact hole and electrically connected to the portion of the metal silicide layer.