公开(公告)号：US20220337260A1

公开(公告)日：2022-10-20

申请号：US17675342

申请日：2022-02-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYOCHUL SHIN ,  SEUNGYEOB BAEK ,  SUNGNO LEE ,  HEECHANG HWANG ,  MICHAEL CHOI

IPC: H03M1/10 ,  H03L7/081 ,  H04L1/00 ,  H04L25/03 ,  H04B1/16

Abstract: An analog-to-digital conversion circuit includes; a first analog-to-digital converter (ADC), a second ADC and a third ADC collectively configured to perform conversion operations according to a time-interleaving technique, and a timing calibration circuit configured to calculate correlation values and determine differences between the correlation values using first samples generated by the first ADC, second samples generated by the second ADC, and third samples generated by the third ADC during sampling periods, wherein the timing calibration circuit is further configured to control a phase of a clock signal applied to the second ADC in response to a change in absolute value related to the differences generated during the sampling periods.

公开(公告)号：US20190102034A1

公开(公告)日：2019-04-04

申请号：US15974953

申请日：2018-05-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANG-PIL NAM ,  KYUNG-HOON LEE ,  MICHAEL CHOI

IPC: G06F3/041 ,  G06F3/044 ,  G06F3/0354

Abstract: A touch detection device and a method of detecting a touch employ: a current-to-voltage converter configured to convert a reception signal received from a touch panel into a sensing signal, and further configured to be periodically reset for a first time period in response to a reset signal; a digital-to-analog converter configured to convert an analog signal based on the sensing signal into a first digital output signal, and a controller configured to generate a second digital output signal based on the first digital output signal by performing data interpolation on a first portion of the first digital output signal corresponding to the first time period.

公开(公告)号：US20150212643A1

公开(公告)日：2015-07-30

申请号：US14604948

申请日：2015-01-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JIN-CHUL LEE ,  KI-DUK KIM ,  HO-JIN PARK ,  YOON-KYUNG CHOI ,  MICHAEL CHOI ,  CHOONG-HOON LEE ,  SANG-HYUB KANG ,  KYUNG-HOON LEE

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0416 ,  G06F3/044

Abstract: A touch sensing device includes a touch panel and a receiving unit. The touch panel generates first to third receiving signals corresponding to a touch occurring at the touch sensing device. The receiving unit is connected to the touch panel through first to third receiving lines to receive the first to third receiving signals through the first to third receiving lines, respectively. The receiving unit includes a differential signal generator for excluding a first common signal common to the first and second receiving signals from each of the first and second receiving signals to generate first differential signals when a first touch sensing operation is performed. The differential signal generator excludes a second common signal common to the second and third receiving signals from each of the second and third receiving signals to generate second differential signals when a second touch sensing operation is performed.

Abstract translation: 触摸感测装置包括触摸面板和接收单元。 触摸面板产生对应于在触摸感测装置处发生的触摸的第一至第三接收信号。 接收单元通过第一至第三接收线路连接到触摸面板，以分别通过第一至第三接收线路接收第一至第三接收信号。 接收单元包括差分信号发生器，用于从第一和第二接收信号中的每一个排除第一和第二接收信号共同的第一公共信号，以在执行第一触摸感测操作时产生第一差分信号。 差分信号发生器从第二和第三接收信号中的每一个排除第二和第三接收信号共同的第二公共信号，以在执行第二触摸感测操作时产生第二差分信号。

公开(公告)号：US20240333352A1

公开(公告)日：2024-10-03

申请号：US18528438

申请日：2023-12-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JOOIK CHUNG ,  BYUNG-WOOK MIN ,  YOUNGJOO LEE ,  JUNHYEOK YANG ,  JOUNG HYUN YIM ,  CHANYOUNG JEONG ,  MICHAEL CHOI

IPC: H04B7/06 ,  H01Q3/26

CPC classification number: H04B7/0617 ,  H01Q3/26 ,  H04B7/0602

Abstract: An antenna device includes an antenna array including a plurality of first antenna elements, arranged in a 2-by-2 array, a plurality of second antenna elements arranged in a 2-by-2 array, a first switching circuit, a second switching circuit connected to the first switching circuit and the first antenna elements, a third switching circuit connected to the first switching circuit and the second antenna elements, and a processor connected to the switching circuits. The processor is configured to control at least one of the switching circuits to operate in a single mode, among the plurality of modes, based on a single beam pattern among a plurality of predetermined beam patterns and to feed power to the antenna array through the first switching circuit, the second switching circuit, and the third switching circuit, to transmit a signal having the beam pattern.

公开(公告)号：US20220385297A1

公开(公告)日：2022-12-01

申请号：US17827135

申请日：2022-05-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNGNO LEE ,  HEECHANG HWANG ,  YONGKI LEE ,  KYOUNGJUN MOON ,  HYOCHUL SHIN ,  MICHAEL CHOI

IPC: H03M1/10

Abstract: An analog-to-digital conversion circuit includes analog-to-digital converters (ADCs) including a target analog-to-digital converter (ADC) providing second data samples, a first adjacent ADC providing first data samples, and a second adjacent ADC providing third data samples. The ADCs perform an analog-to-digital conversion using a time-interleaving approach in response to clock signals having different phases and including a reference clock signal. A timing calibration circuit includes a relative time skew generator generating a relative time skew and an absolute time skew generator generate an absolute time skew. A clock generator adjusts at least one phase of the clock signals based on the absolute time skew.

公开(公告)号：US20210250040A1

公开(公告)日：2021-08-12

申请号：US17027874

申请日：2020-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： IL HOON JANG ,  HYUNG DONG ROH ,  SEUNG YEOB BAEK ,  MICHAEL CHOI

IPC: H03M3/00 ,  H04B1/12

Abstract: An analog-to-digital converting apparatus includes a first stage converter which performs a first analog-to-digital conversion on an input analog signal during a first stage period, a second stage converter which receives a first residue from the first stage converter amplified by a first gain and which performs a second analog-to-digital conversion during a second stage period, and a recombination logic circuit which combines a first output signal from the first stage converter and a second output signal from the second stage converter into an output digital signal that corresponds to the input analog signal. The second stage converter generates a second stage feedback signal obtained by amplifying the second output signal by the first gain during a first sub-cycle in the second stage period, and generates a second output signal of a second sub-cycle subsequent to the first sub-cycle based on the second stage feedback signal.

公开(公告)号：US20190207620A1

公开(公告)日：2019-07-04

申请号：US16186761

申请日：2018-11-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANG-HEON LEE ,  MICHAEL CHOI

IPC: H03M3/00 ,  H04B1/16

Abstract: An analog-digital converter has multiple feedback, and includes: a capacitor digital-analog converter including a plurality of switches driven by a digital code, and a plurality of capacitors respectively connected to the plurality of switches, wherein the capacitor digital-analog converter is configured to generate a residue voltage based on an analog input voltage and a voltage corresponding to the digital code; first and second feedback capacitors each storing the residue voltage; an integrator configured to generate an integral signal by integrating the residue voltage; first and second comparators respectively configured to generate first and second comparison signals from the integral signal; and a digital logic circuitry configured to receive the first and second comparison signals, and generate a digital output signal from the first and second comparison signals, the digital output signal corresponding to the digital code during a successive approximation register (SAR) analog-digital conversion interval, and the digital output signal corresponding to an average of first and second digital control signals during a delta sigma analog-digital conversion interval, wherein the first and second comparison signals are respectively fed back to the first and second feedback capacitors. The analog-digital converter may be included in various electronic devices, including communication devices.

公开(公告)号：US20140232453A1

公开(公告)日：2014-08-21

申请号：US14159670

申请日：2014-01-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MICHAEL CHOI ,  MARUTHA MUTHU MUTHUVEERAN

IPC: G05F3/16

CPC classification number: G05F3/16 ,  G05F3/30

Abstract: Provided is a circuit for generating a reference voltage. The circuit includes a band gap circuit generating a first current having a size that increases in proportion to an absolute temperature and a second current having a size that decreases in proportion to the absolute temperature, and outputting a reference voltage based on the first current and the second current; a mirroring circuit mirroring a sum of the first current and the second current and outputting a mirroring voltage that is in proportion to the sum of the first current and the second current; and a start-up circuit receiving the mirroring voltage from the mirroring circuit and providing a driving current for generating the first current or the second current to the band gap circuit until a time when the first current starts to be generated in the band gap circuit.

Abstract translation: 提供了用于产生参考电压的电路。 电路包括带隙电路，其产生具有与绝对温度成比例地增加的尺寸的第一电流和具有与绝对温度成比例地减小的尺寸的第二电流，并且基于第一电流和 第二电流 镜像电路，其反映第一电流和第二电流的和，并输出与第一电流和第二电流的和成比例的镜像电压; 以及起动电路，其从所述镜像电路接收所述镜像电压，并且向所述带隙电路提供用于产生所述第一电流或第二电流的驱动电流，直到在所述带隙电路中开始产生所述第一电流的时刻为止。