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公开(公告)号：US20220385294A1
公开(公告)日：2022-12-01
申请号：US17675351
申请日：2022-02-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： KANGYEOP CHOO , WOOSEOK KIM , WONSIK YU , CHANYOUNG JEONG
Abstract: A digitally controlled oscillator (DCO) includes; a current mirror configured to generate a supply current in response to a bias voltage matching a reference current, a variable resistor connected to the current mirror through a first node outputting the reference current and configured to provide a variable resistance in response to a first control signal, an oscillation circuit connected to the current mirror through a second node outputting the supply current and configured to generate an oscillation signal in response to the supply current, and a feedback circuit configured to control the bias voltage in relation to at least one of a voltage at the first node and a voltage at the second node.
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公开(公告)号：US20220311424A1
公开(公告)日：2022-09-29
申请号：US17702482
申请日：2022-03-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JUSUNG LEE , WOOSEOK KIM , TAEIK KIM , CHANYOUNG JEONG
Abstract: A bandgap reference circuit includes a reference current generation circuit configured to output a bandgap reference current insensitive to a temperature change, by using a first voltage inversely proportional to temperature and a third voltage proportional to temperature. The third voltage is a difference between the first voltage and a second voltage. The bandgap reference circuit further includes a resistivity temperature coefficient cancellation circuit configured to remove a first current proportional to temperature from the bandgap reference current by using the third voltage, and a reference voltage generation circuit configured to output a bandgap reference voltage insensitive to a temperature change by using a second current inversely proportional to temperature and a first resistance proportional to temperature. The second current is generated by removing the first current from the bandgap reference current.
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公开(公告)号：US20220345137A1
公开(公告)日：2022-10-27
申请号：US17509540
申请日：2021-10-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： KANGYEOP CHOO , INSUNG KIM , WOOSEOK KIM , TAEIK KIM , SUNGHYUCK LEE , CHANYOUNG JEONG
Abstract: A phased locked loop includes; a load circuit that generates an output signal in response to a driving voltage, a frequency calibration circuit that generates a calibration signal in response to an output frequency of the output signal and a target frequency, and a regulator that generates the driving voltage in response to the calibration signal.
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公开(公告)号：US20240333352A1
公开(公告)日：2024-10-03
申请号：US18528438
申请日：2023-12-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： JOOIK CHUNG , BYUNG-WOOK MIN , YOUNGJOO LEE , JUNHYEOK YANG , JOUNG HYUN YIM , CHANYOUNG JEONG , MICHAEL CHOI
CPC classification number: H04B7/0617 , H01Q3/26 , H04B7/0602
Abstract: An antenna device includes an antenna array including a plurality of first antenna elements, arranged in a 2-by-2 array, a plurality of second antenna elements arranged in a 2-by-2 array, a first switching circuit, a second switching circuit connected to the first switching circuit and the first antenna elements, a third switching circuit connected to the first switching circuit and the second antenna elements, and a processor connected to the switching circuits. The processor is configured to control at least one of the switching circuits to operate in a single mode, among the plurality of modes, based on a single beam pattern among a plurality of predetermined beam patterns and to feed power to the antenna array through the first switching circuit, the second switching circuit, and the third switching circuit, to transmit a signal having the beam pattern.
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