公开(公告)号：US20180254246A1

公开(公告)日：2018-09-06

申请号：US15697881

申请日：2017-09-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-jine PARK ,  Kee-sang KWON ,  Jae-jik BAEK ,  Yong-sun KO ,  Kwang-wook LEE

IPC: H01L23/532 ,  H01L23/522 ,  H01L29/78 ,  H01L21/768 ,  H01L21/285

CPC classification number: H01L23/53204 ,  H01L21/28518 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76867 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76889 ,  H01L21/823431 ,  H01L21/823475 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/53209 ,  H01L29/41791 ,  H01L29/785

Abstract: An integrated circuit device includes an insulating film on a substrate, a lower wiring layer penetrating at least a portion of the insulating film, the lower wiring layer including a first metal, a lower conductive barrier film surrounding a bottom surface and a sidewall of the lower wiring layer, the lower conductive barrier film including a second metal different from the first metal, a first metal silicide capping layer covering a top surface of the lower wiring layer, the first metal silicide capping layer including the first metal, and a second metal silicide capping layer contacting the first metal silicide capping layer and disposed on the lower conductive barrier film, the second metal silicide capping layer including the second metal.