公开(公告)号：US20230268248A1

公开(公告)日：2023-08-24

申请号：US18310284

申请日：2023-05-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seonho LEE ,  Jinsu KIM ,  Junwoo MYUNG ,  Yongjin PARK ,  Jaekul LEE

IPC: H01L23/373 ,  H01L23/498 ,  H01L23/053 ,  H01L23/31

CPC classification number: H01L23/3735 ,  H01L23/49822 ,  H01L23/053 ,  H01L23/3128

Abstract: A semiconductor device including a semiconductor chip having a first surface and a second surface opposite to the first surface, a first heat dissipation member on the second surface of the semiconductor chip, the first heat dissipation member having a vertical thermal conductivity in a direction perpendicular to the second surface, and a horizontal thermal conductivity in a direction parallel to the second surface, the first vertical thermal conductivity being smaller than the first horizontal thermal conductivity, and a second heat dissipation member comprising a vertical pattern penetrating the first heat dissipation member, the second heat dissipation member having a vertical thermal conductivity that is greater than the vertical thermal conductivity of the first heat dissipation member may be provided.

公开(公告)号：US20240243090A1

公开(公告)日：2024-07-18

申请号：US18618133

申请日：2024-03-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaekul LEE ,  Hyungsun JANG ,  Gayoung KIM ,  Minjeong SHIN

IPC: H01L23/00 ,  H01L25/10

CPC classification number: H01L24/20 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/2101 ,  H01L2224/2105 ,  H01L2224/221 ,  H01L2224/73101 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058

Abstract: A semiconductor package includes a lower redistribution layer disposed on a lower surface of the semiconductor chip including an insulating layer, a redistribution pattern, a via, an under bump metal (UBM), and a post disposed on the redistribution pattern. The post vertically overlaps with the UBM. A mold layer is on the lower redistribution layer and surrounds the semiconductor chip. A connecting terminal is connected to the UBM. The UBM includes a first section contacting the redistribution pattern, and a second section contacting the insulating layer. The post has a ring shape having an inner surface and an outer surface when viewed in a top view. A maximum width of the inner surface is less than a maximum width of an upper surface of the first section. A maximum width of the outer surface is greater than the maximum width of the upper surface of the first section.

公开(公告)号：US20210193555A1

公开(公告)日：2021-06-24

申请号：US17029334

申请日：2020-09-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seonho LEE ,  Jinsu KIM ,  Junwoo MYUNG ,  Yongjin PARK ,  Jaekul LEE

IPC: H01L23/373 ,  H01L23/31 ,  H01L23/053 ,  H01L23/498

Abstract: A semiconductor device including a semiconductor chip having a first surface and a second surface opposite to the first surface, a first heat dissipation member on the second surface of the semiconductor chip, the first heat dissipation member having a vertical thermal conductivity in a direction perpendicular to the second surface, and a horizontal thermal conductivity in a direction parallel to the second surface, the first vertical thermal conductivity being smaller than the first horizontal thermal conductivity, and a second heat dissipation member comprising a vertical pattern penetrating the first heat dissipation member, the second heat dissipation member having a vertical thermal conductivity that is greater than the vertical thermal conductivity of the first heat dissipation member may be provided.

公开(公告)号：US20220246568A1

公开(公告)日：2022-08-04

申请号：US17479042

申请日：2021-09-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaekul LEE ,  Hyungsun JANG ,  Gayoung KIM ,  Minjeong SHIN

IPC: H01L23/00 ,  H01L25/10

Abstract: A semiconductor package includes a lower redistribution layer disposed on a lower surface of the semiconductor chip including an insulating laver, a redistribution pattern, a via, an under bump metal (UBM), and a post disposed on the redistribution pattern. The post vertically overlaps with the UBM. A mold layer is on the lower redistribution layer and surrounds the semiconductor chip. A connecting terminal is connected to the UBM. The UBM includes a first section contacting the redistribution pattern, and a second section contacting the insulating layer. The lost has a ring shape having an inner surface and an outer surface when viewed a top view. A maximum width of the inner surface is less than a Maximum width of an upper surface of the first section. A maximum width of the outer surface is greater than the maximum width of the upper surface of the first section.