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公开(公告)号：US10067825B2
公开(公告)日：2018-09-04
申请号：US15061349
申请日：2016-03-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jae-Woo Im , Sang-Hyun Joo
Abstract: A memory cell array includes memory cells that are formed in vertical channels extended in a vertical direction with respect to a substrate. The vertical channels are arranged in a zig-zag manner in parallel to the first direction. A read-write circuit is connected to the memory cells via bit lines. An address decoder decodes an address to provide decoded address signals to the read-write circuit. The memory cells include outer cells and inner cells. A distance between one of the outer cells and a common source node is smaller than a distance between one of the inner cells and the common source node. Data of the memory cells are distributed among ECC sectors and a data input-output order of the memory cells is arranged such that each ECC sector has substantially the same number of the outer cells and the inner cells. Each ECC sector corresponds to an ECC operation unit.
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公开(公告)号：US20170125091A1
公开(公告)日：2017-05-04
申请号：US15288758
申请日：2016-10-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyun-Jun Yoon , Jae-Woo Im
CPC classification number: G11C11/5642 , G11C7/08 , G11C11/5628 , G11C16/0483 , G11C16/20 , G11C16/32 , G11C16/3404
Abstract: A non-volatile memory device for selectively performing a recovery operation and a method of operating the same are provided. The method of operating a non-volatile memory device includes receiving a first read command, performing a first sensing operation in response to the first read command, and receiving a second read command. The method further includes completing a memory operation corresponding to the first read command without performing a recovery operation when the second read command is received before the first sensing operation is completed, and performing a second sensing operation in response to the second read command.
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公开(公告)号：US09478295B2
公开(公告)日：2016-10-25
申请号：US15089775
申请日：2016-04-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Myung-Hoon Choi , Jae-Woo Im , Ki-Tae Park
CPC classification number: G11C16/14 , G11C16/10 , G11C16/16 , G11C16/26 , G11C16/3459
Abstract: A non-volatile memory device receives a start command through a command line, receives an address through an address line, receives at least one setting value through the address line, receives a confirm command corresponding to the start command through the command line, sets at least one parameter of the non-volatile memory device as the setting value based on the start command, a number of the setting value, and the confirm command, and executes an operation that corresponds to the start command, on a memory cell that corresponds to the address, based on the set parameter.
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Patent Agency Ranking
公开(公告)号：US10684914B2
公开(公告)日：2020-06-16
申请号：US16121072
申请日：2018-09-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jae-Woo Im , Sang-Hyun Joo
Abstract: A memory cell array includes memory cells that are formed in vertical channels extended in a vertical direction with respect to a substrate. The vertical channels are arranged in a zigzag manner in parallel to the first direction. A read-write circuit is connected to the memory cells via bit lines. An address decoder decodes an address to provide decoded address signals to the read-write, circuit. The memory cells include outer cells and inner cells. A distance between one of the outer cells and a common source node is smaller than a distance between one of the inner cells and the common source node. Data of the memory cells are distributed among ECC sectors and a data input-output order of the memory cells is arranged such that each ECC sector has substantially the same number of the outer cells and the inner cells. Each ECC sector corresponds to an ECC operation unit.
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公开(公告)号：US20180373592A1
公开(公告)日：2018-12-27
申请号：US16121072
申请日：2018-09-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jae-Woo Im , Sang-Hyun Joo
IPC: G06F11/10
CPC classification number: G06F11/1068 , G11C29/52
Abstract: A memory cell array includes memory cells that are formed in vertical channels extended in a vertical direction with respect to a substrate. The vertical channels are arranged in a zigzag manner in parallel to the first direction. A read-write circuit is connected to the memory cells via bit lines. An address decoder decodes an address to provide decoded address signals to the read-write, circuit. The memory cells include outer cells and inner cells. A distance between one of the outer cells and a common source node is smaller than a distance between one of the inner cells and the common source node. Data of the memory cells are distributed among ECC sectors and a data input-output order of the memory cells is arranged such that each ECC sector has substantially the same number of the outer cells and the inner cells. Each ECC sector corresponds to an ECC operation unit.
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公开(公告)号：US10026473B2
公开(公告)日：2018-07-17
申请号：US15288758
申请日：2016-10-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyun-Jun Yoon , Jae-Woo Im
Abstract: A non-volatile memory device for selectively performing a recovery operation and a method of operating the same are provided. The method of operating a non-volatile memory device includes receiving a first read command, performing a first sensing operation in response to the first read command, and receiving a second read command. The method further includes completing a memory operation corresponding to the first read command without performing a recovery operation when the second read command is received before the first sensing operation is completed, and performing a second sensing operation in response to the second read command.
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公开(公告)号：US09779833B2
公开(公告)日：2017-10-03
申请号：US15291676
申请日：2016-10-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sang-Hyun Joo , Jae-Woo Im
CPC classification number: G11C16/3495 , G11C16/0483 , G11C16/10 , G11C16/3459
Abstract: A method of programming a flash memory device, which is a nonvolatile memory device including a plurality of pages, includes executing an Nth program loop of a program operation by applying an Nth selected program voltage to a selected word line from among the plurality of pages, and performing a program verify operation by applying a program verify voltage to the selected word line, counting the number of memory cells having a threshold voltage which is greater than or equal to the program verify voltage, from among memory cells connected to the selected word line, generating a program voltage revision value based on a result of the counting and an operational condition of the Nth program loop, and adding the program voltage revision value to an Mth preset program voltage of an Mth program loop executed after the Nth program loop where M>N.
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公开(公告)号：US09305657B2
公开(公告)日：2016-04-05
申请号：US14522753
申请日：2014-10-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Myung-Hoon Choi , Jae-Woo Im , Ki-Tae Park
CPC classification number: G11C16/14 , G11C16/10 , G11C16/16 , G11C16/26 , G11C16/3459
Abstract: A non-volatile memory device receives a start command through a command line, receives an address through an address line, receives at least one setting value through the address line, receives a confirm command corresponding to the start command through the command line, sets at least one parameter of the non-volatile memory device as the setting value based on the start command, a number of the setting value, and the confirm command, and executes an operation that corresponds to the start command, on a memory cell that corresponds to the address, based on the set parameter.
Abstract translation: 非易失性存储装置通过命令行接收开始命令，通过地址线接收地址，通过地址线接收至少一个设定值，通过命令行接收与开始命令对应的确认命令，设定为 基于开始命令，设定值的数量和确认命令作为设定值的非易失性存储器件的至少一个参数，并且对应于开始命令的存储单元执行对应于开始命令的操作 该地址，基于设置的参数。
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