公开(公告)号：US20210366344A1

公开(公告)日：2021-11-25

申请号：US17090720

申请日：2020-11-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYUNGHOON CHUNG ,  JAESUNG KANG ,  JIHYUN LEE ,  JEONGWOO LIM ,  YUNSEOK JANG ,  JAEWON CHOI

IPC: G09G3/20 ,  H03F3/45

Abstract: An operational amplifier includes an input stage with a first main input unit, a first auxiliary input unit, a second main input unit and a second auxiliary input unit, an amplification stage with a first current mirror receiving currents from the first main input unit and the first auxiliary input unit, and a second current mirror receiving currents from the second main input unit and the second auxiliary input unit, an output stage receiving voltages from the first current mirror and the second current mirror, a voltage storage unit storing an intermediate voltage based on an output signal generated by the output stage during at least one of a first operation period and a second operation period, and a switching unit that differently controls a first feedback path between the output stage and the input stage and a second feedback path between the output stage to the voltage storage unit in accordance with the first operation period and the second operation period.

公开(公告)号：US20240079250A1

公开(公告)日：2024-03-07

申请号：US18118303

申请日：2023-03-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JAEWON CHOI ,  JONGBO SHIM

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L25/16

CPC classification number: H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L25/16 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2924/1432 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19042

Abstract: A method of manufacturing a semiconductor package includes; positioning a passive element on an upper insulating layer of a package substrate, wherein the upper insulating layer of the package substrate exposes upper surfaces of first substrate pads and second substrate pads, the passive element includes; electrodes on respective corners of a lower surface of the passive element, solder members respectively on the electrodes, and an insulating spacer on a central portion of the lower surface of the passive element between the solder members, and the solder members are respectively disposed on the second substrate pads. The method further includes; bonding the passive element on the package substrate through the solder members and the second substrate pads, and bonding a semiconductor device to the first substrate pads on the package substrate through conductive bumps on a lower surface of the semiconductor device, wherein the semiconductor device is laterally spaced apart from the passive element on the package substrate.

公开(公告)号：US20210013888A1

公开(公告)日：2021-01-14

申请号：US16853076

申请日：2020-04-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SHINWOONG KIM ,  MYOUNGGYUN KIM ,  CHULHO KIM ,  INHYO RYU ,  JAEWON CHOI ,  SANGWOOK HAN ,  HONGGUL HAN

IPC: H03L7/089 ,  H03L7/087 ,  H03L7/095 ,  H03L7/093 ,  H03L7/091 ,  H03L7/099 ,  H03L7/195 ,  H03L7/14

Abstract: A phase locked circuit includes an oscillator configured to generate an output clock signal, a first phase detector configured to detect a phase difference between an input clock signal and a feedback clock signal based on the output clock signal, a second phase detector having a wider phase locking range than that of the first phase detector and configured to detect the phase difference between the input clock signal and the feedback clock signal, and a charge pump controller configured to control an output current of a charge pump included in the second phase detector based on the phase difference detected by the first phase detector. When the phase difference between the input clock signal and the feedback clock signal is within the phase locking range of the first phase detector, the oscillator and the first phase detector are connected to each other.