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公开(公告)号:US09984757B2
公开(公告)日:2018-05-29
申请号:US15351576
申请日:2016-11-15
发明人: Joon-Ho Lee , Sil-Wan Chang , Hyun-Jin Choi , Dong-Hoon Ham
CPC分类号: G11C16/26 , G11C5/144 , G11C11/5642 , G11C16/0483 , G11C16/30 , G11C16/3418
摘要: An operating method of a memory controller, configured to control a non-volatile memory device that performs a refresh read operation, detects a power on state or power off state of the non-volatile memory device and issues a refresh read command. The non-volatile memory device that receives the refresh read command is controlled to perform, one time, the refresh read operation including a read operation on one of a plurality of word lines with respect to each of the plurality of memory blocks.
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公开(公告)号:US20180081594A1
公开(公告)日:2018-03-22
申请号:US15605148
申请日:2017-05-25
发明人: SANG-WON JUNG , Yoon-Young Kyung , Hyun-Jin Choi , Ji-Soo Kim , Joon-Ho Lee , Walter Jun , Jae-Sung Jung , Jun-Seok Park , Young-Woo Jung
IPC分类号: G06F3/06
CPC分类号: G06F3/0659 , G06F3/0613 , G06F3/0673 , G06F13/00 , G06F2212/70 , G11C7/1084 , G11C7/22 , G11C11/5628 , G11C16/10 , G11C16/3495 , G11C2211/5641
摘要: A method of operating a storage device including first and second memory regions includes adjusting a write ratio of the first memory region to the second memory region for write data received from a host in response to a write request from the host, and writing the write data to the first and second memory regions at the adjusted write ratio. The first memory region includes memory cells having a first write speed, and the second memory region includes memory cells having a second write speed that is different from the first write speed.
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公开(公告)号:US10409715B2
公开(公告)日:2019-09-10
申请号:US15483255
申请日:2017-04-10
发明人: Sung-Hwan Bae , Chan-Ik Park , Hyun-Jin Choi , Seong-Jun Ahn , In-Hwan Doh
IPC分类号: G06F12/00 , G06F13/00 , G06F13/28 , G06F12/02 , G06F12/0873 , G06F12/1036 , G06F12/14 , G06F21/78
摘要: In an operating method of a memory controller, the memory controller includes a logical-to-logical (L2L) mapping table including mapping information between a first logical area and a second logical area and a logical-to-physical (L2P) mapping table including mapping information between the second logical area and a physical area of a memory device. The operating method includes receiving a first logical address of the first logical area and a first command for changing the L2L mapping table to access first data stored in the memory device through the first logical address, detecting a second logical address of the second logical area mapped to a physical address of the physical area in which the first data is stored, in response to the first command, and changing the L2L mapping table to map the first logical address to the second logical address.
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