公开(公告)号：US20160126096A1

公开(公告)日：2016-05-05

申请号：US14994120

申请日：2016-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Ho KANG ,  Bong-Jin KUH ,  Yong-Kyu JOO ,  Sung-Ho HEO ,  Hee-Seok KIM ,  Yong-Sung PARK

IPC: H01L21/02 ,  H01L21/3065

CPC classification number: H01L21/02636 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/3065 ,  H01L21/67109

Abstract: In a method of forming an epitaxial layer, an etching gas may be decomposed to form decomposed etching gases. A source gas may be decomposed to form decomposed source gases. The decomposed source gases may be applied to a substrate to form the epitaxial layer on the substrate. A portion of the epitaxial layer on a specific region of the substrate may be etched using the decomposed etching gases. Before the etching gas is introduced into the reaction chamber, the etching gas may be previously decomposed. The decomposed etching gases may then be introduced into the reaction chamber to etch the epitaxial layer on the substrate. As a result, the epitaxial layer on the substrate may have a uniform distribution.

Abstract translation: 在形成外延层的方法中，蚀刻气体可能被分解以形成分解的蚀刻气体。 源气体可能被分解形成分解的源气体。 分解的源气体可以施加到衬底上以在衬底上形成外延层。 可以使用分解的蚀刻气体蚀刻在衬底的特定区域上的外延层的一部分。 在蚀刻气体被引入反应室之前，蚀刻气体可以预先分解。 然后将分解的蚀刻气体引入反应室以蚀刻衬底上的外延层。 结果，衬底上的外延层可以具有均匀的分布。

公开(公告)号：US20150372194A1

公开(公告)日：2015-12-24

申请号：US14764513

申请日：2014-01-28

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： Nam-Goo CHA ,  Bong-Jin KUH ,  Han-Mei CHOI

IPC: H01L33/24 ,  H01L33/18 ,  H01L33/20

CPC classification number: H01L33/24 ,  B82Y20/00 ,  H01L33/005 ,  H01L33/08 ,  H01L33/18 ,  H01L33/20

Abstract: There is provided a nanostructure semiconductor light emitting device including a base layer formed of a first conductivity-type semiconductor, a first insulating layer disposed on the base layer and having a plurality of first openings exposing partial regions of the base layer, a plurality of nanocores disposed in the exposed regions of the base layer and formed of the first conductivity-type semiconductor, an active layer disposed on surfaces of the plurality of nanocores positioned to be higher than the first insulating layer, a second insulating layer disposed on the first insulating layer and having a plurality of second openings surrounding the plurality of nanocores and the active layer disposed on the surfaces of the plurality of nanocores, and a second conductivity-type semiconductor layer disposed on the surface of the active layer positioned to be higher than the second insulating layer.

Abstract translation: 提供一种纳米结构半导体发光器件，其包括由第一导电型半导体形成的基极层，设置在基底层上的第一绝缘层，并且具有暴露基底层的部分区域的多个第一开口，多个纳米孔 设置在所述基底层的所述露出区域中并且由所述第一导电型半导体形成，所述有源层设置在所述多个纳米孔的位于比所述第一绝缘层高的表面上;第二绝缘层，设置在所述第一绝缘层上 并且具有围绕所述多个纳米孔的多个第二开口和设置在所述多个纳米孔的表面上的所述有源层，以及设置在所述有源层的表面上的第二导电类型半导体层，所述第二导电类型半导体层被定位成高于所述第二绝缘体 层。

公开(公告)号：US20140193967A1

公开(公告)日：2014-07-10

申请号：US14152191

申请日：2014-01-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Ho KANG ,  Bong-Jin KUH ,  Yong-Kyu JOO ,  Sung-Ho HEO ,  Hee-Seok KIM ,  Yong-Sung PARK

IPC: H01L21/02

CPC classification number: H01L21/02636 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/3065 ,  H01L21/67109

Abstract: In a method of forming an epitaxial layer, an etching gas may be decomposed to form decomposed etching gases. A source gas may be decomposed to form decomposed source gases. The decomposed source gases may be applied to a substrate to form the epitaxial layer on the substrate. A portion of the epitaxial layer on a specific region of the substrate may be etched using the decomposed etching gases. Before the etching gas is introduced into the reaction chamber, the etching gas may be previously decomposed. The decomposed etching gases may then be introduced into the reaction chamber to etch the epitaxial layer on the substrate. As a result, the epitaxial layer on the substrate may have a uniform distribution.

Abstract translation: 在形成外延层的方法中，蚀刻气体可能被分解以形成分解的蚀刻气体。 源气体可能被分解形成分解的源气体。 分解的源气体可以施加到衬底上以在衬底上形成外延层。 可以使用分解的蚀刻气体蚀刻在衬底的特定区域上的外延层的一部分。 在蚀刻气体被引入反应室之前，蚀刻气体可以预先分解。 然后将分解的蚀刻气体引入反应室以蚀刻衬底上的外延层。 结果，衬底上的外延层可以具有均匀的分布。

公开(公告)号：US20130213910A1

公开(公告)日：2013-08-22

申请号：US13671989

申请日：2012-11-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung-Ho KANG ,  Bong-Jin KUH ,  Ki-Seok KIM ,  Ki-Chul KIM ,  Ik-Soo KIM ,  Yong-Kyu JOO ,  Sang-Cheol HA

IPC: H01L21/683

CPC classification number: H01L21/683 ,  H01L21/67303 ,  H01L21/67309

Abstract: Provided is a boat for loading semiconductor substrates that includes a top plate and a bottom plate separated from each other, a rod extending from the bottom plate to the top plate and disposed between the top plate and the bottom plate, a plurality of buffer plates disposed between the top plate and the bottom plate and separated from each other by a first distance along a lengthwise direction of the rod, and a support provided between a first buffer plate and a second buffer plate which neighbor each other and supporting a loaded semiconductor substrate.

Abstract translation: 提供一种用于装载半导体基板的船，其包括彼此分离的顶板和底板，从底板延伸到顶板并设置在顶板和底板之间的杆，设置有多个缓冲板 在顶板和底板之间并且沿着杆的长度方向彼此分开第一距离，以及设置在彼此相邻并支撑加载的半导体衬底的第一缓冲板和第二缓冲板之间的支撑件。

公开(公告)号：US20130170784A1

公开(公告)日：2013-07-04

申请号：US13726346

申请日：2012-12-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki-Chul KIM ,  Bong-Jin KUH ,  Jung-Yun WON ,  Eun-Ha LEE ,  Han-Mei CHOI

IPC: G02B6/122 ,  G02F1/035 ,  G02B6/124

CPC classification number: G02B6/13 ,  G02B6/122 ,  G02B6/124 ,  G02B6/131 ,  G02B6/132 ,  G02B2006/12061 ,  G02B2006/121 ,  G02B2006/12107 ,  G02B2006/12147 ,  G02F1/025 ,  G02F1/035 ,  H01L29/66477

Abstract: A semiconductor device includes a single crystalline substrate, an electrical element and an optical element. The electrical element is disposed on the single crystalline substrate. The electrical element includes a gate electrode extending in a crystal orientation and source and drain regions adjacent to the gate electrode. The source region and the drain region are arranged in a direction substantially perpendicular to a direction in which the gate electrode extends. The optical element is disposed on the single crystalline substrate. The optical element includes an optical waveguide extending in a crystal orientation .

公开(公告)号：US20140357062A1

公开(公告)日：2014-12-04

申请号：US14290171

申请日：2014-05-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joong-Han SHIN ,  Bong-Jin KUH ,  Tae-Gon KIM ,  Han-Mei CHOI ,  Jeong-Meung KIM

IPC: H01L21/02

CPC classification number: G02B6/136 ,  G02B6/12004 ,  G02B2006/12061 ,  G02B2006/12169

Abstract: A method of fabricating a semiconductor device, the method including forming a trench on a substrate; forming an insulating layer pattern within the trench; depositing an amorphous material on the substrate and the insulating layer pattern; planarizing the amorphous material; removing a portion of the amorphous material, the removed portion of the amorphous material being on an area of the substrate where the trench has been formed; crystallizing remaining portions of the amorphous material into a single crystal material; and planarizing the single crystal material.

Abstract translation: 一种制造半导体器件的方法，所述方法包括在衬底上形成沟槽; 在沟槽内形成绝缘层图案; 在基板和绝缘层图案上沉积非晶材料; 平面化无定形材料; 去除所述非晶材料的一部分，所述非晶材料的去除部分位于已经形成所述沟槽的所述衬底的区域上; 将所述无定形材料的剩余部分结晶成单晶材料; 并平面化单晶材料。