公开(公告)号：US20140357062A1

公开(公告)日：2014-12-04

申请号：US14290171

申请日：2014-05-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joong-Han SHIN ,  Bong-Jin KUH ,  Tae-Gon KIM ,  Han-Mei CHOI ,  Jeong-Meung KIM

IPC: H01L21/02

CPC classification number: G02B6/136 ,  G02B6/12004 ,  G02B2006/12061 ,  G02B2006/12169

Abstract: A method of fabricating a semiconductor device, the method including forming a trench on a substrate; forming an insulating layer pattern within the trench; depositing an amorphous material on the substrate and the insulating layer pattern; planarizing the amorphous material; removing a portion of the amorphous material, the removed portion of the amorphous material being on an area of the substrate where the trench has been formed; crystallizing remaining portions of the amorphous material into a single crystal material; and planarizing the single crystal material.

Abstract translation: 一种制造半导体器件的方法，所述方法包括在衬底上形成沟槽; 在沟槽内形成绝缘层图案; 在基板和绝缘层图案上沉积非晶材料; 平面化无定形材料; 去除所述非晶材料的一部分，所述非晶材料的去除部分位于已经形成所述沟槽的所述衬底的区域上; 将所述无定形材料的剩余部分结晶成单晶材料; 并平面化单晶材料。