公开(公告)号：US10062493B2

公开(公告)日：2018-08-28

申请号：US14552867

申请日：2014-11-25

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Geon Se Chang ,  Young Do Kweon ,  Jin Hyuck Yang

IPC: H01F27/29 ,  H01F5/00 ,  H01F27/28 ,  H01F17/00

CPC classification number: H01F27/2804 ,  H01F17/0006 ,  H01F27/292 ,  H01F2027/2809

Abstract: An electronic component and a circuit board having the same mounted thereon. The electronic component includes: a base part; a coil part provided on the base part and including a coil formed by disposing conductive patterns in a spiral shape and an external terminal connected to an end portion of the coil; and a cover part including an external electrode having a first surface contacting an upper surface of the external terminal and a second surface opposing the first surface and a magnetic material part provided on the coil part, made of a magnetic material, and exposing the second surface, wherein a surface area of the first surface is larger than a surface area of the second surface.

公开(公告)号：US09741490B2

公开(公告)日：2017-08-22

申请号：US14175478

申请日：2014-02-07

Applicant: Samsung Electro-Mechanics, Co., Ltd.

Inventor： Hye Yeon Cha ,  Young Do Kweon ,  Young Seuck Yoo ,  Hwan Soo Lee ,  Woon Chul Choi

IPC: H01F5/00 ,  H01F7/06 ,  H01L21/302 ,  H01F41/12 ,  H01F27/28 ,  H01F41/04 ,  H01F27/32

CPC classification number: H01F41/12 ,  H01F27/2804 ,  H01F27/327 ,  H01F41/042 ,  H01F41/127 ,  H01F2027/2809 ,  Y10T29/4902

Abstract: Disclosed herein are a power inductor in which aspect ratios of the innermost pattern and the outermost pattern are similar with those of the intermediate pattern and a manufacturing method thereof. The power inductor includes coil patterns formed on one surface or both surfaces of a core insulating layer; insulating patterns bonded to at least one of an innermost pattern and an outermost pattern of the coil patterns; metal layers plated on surfaces of the coil patterns; and an insulator covering the coil patterns including the metal layers.

公开(公告)号：US09386706B2

公开(公告)日：2016-07-05

申请号：US14140803

申请日：2013-12-26

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sung Han ,  Young Do Kweon ,  Seung Min Baek ,  Yoon Su Kim ,  Young Jae Lee

IPC: H05K3/10

CPC classification number: H05K3/108 ,  H05K2201/098 ,  H05K2203/087 ,  H05K2203/092 ,  H05K2203/095 ,  H05K2203/1105 ,  H05K2203/111 ,  H05K2203/1184 ,  H05K2203/1383 ,  Y10T29/49155

Abstract: A printed circuit board includes an insulating layer; and a circuit pattern formed on the insulating layer. The circuit pattern includes a seed layer and a metal layer formed on the seed layer, and both sides of the seed layer are formed with an etched groove. Also, a method of manufacturing a printed circuit board includes: forming a seed layer on the insulating layer; forming a plating resist formed with an opening on the seed layer; forming a circuit pattern by performing plating processing on the opening; removing the plating resist; forming a passivation layer on the circuit pattern; performing dry etching on a remaining portion other than a side wall of the passivation layer; and performing wet etching the seed layer exposed on a surface by the dry etching.

Abstract translation: 印刷电路板包括绝缘层; 以及形成在绝缘层上的电路图案。 电路图案包括种子层和形成在种子层上的金属层，种子层的两侧形成有蚀刻槽。 另外，制造印刷电路板的方法包括：在绝缘层上形成晶种层; 在种子层上形成具有开口的电镀抗蚀剂; 通过在开口上进行电镀处理形成电路图案; 去除电镀抗蚀剂; 在电路图案上形成钝化层; 对钝化层的侧壁以外的剩余部分进行干蚀刻; 并且通过干蚀刻对表面上暴露的种子层进行湿法蚀刻。

公开(公告)号：US09196506B2

公开(公告)日：2015-11-24

申请号：US13632614

申请日：2012-10-01

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Hyung Jin Jeon ,  Jong In Ryu ,  Seung Wan Shin ,  Seon Hee Moon ,  Young Do Kweon ,  Seung Wook Park

IPC: H01L21/48 ,  H01L23/498 ,  H05K3/46 ,  H05K3/24 ,  H05K3/42

CPC classification number: H01L21/486 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2225/06572 ,  H01L2924/0002 ,  H05K3/244 ,  H05K3/427 ,  H05K3/4602 ,  H05K3/4605 ,  H05K3/4644 ,  H05K2201/0979 ,  H05K2201/10378 ,  H01L2924/00

Abstract: A method for manufacturing an interposer includes forming a via hole in an insulation plate including a resin or a ceramic; simultaneously forming resists for a first upper redistribution layer on the top surface of the insulation plate, and a resistor for a lower redistribution layer on the bottom surface of the insulation plate; plating copper to fill the via hole and simultaneously forming the first upper redistribution layer and the lower redistribution layer along a designed circuit pattern; and forming a first upper protection layer and a lower protection layer to expose a portion of the first upper redistribution layer and a portion of the lower redistribution layer.

Abstract translation: 一种用于制造插入件的方法包括在包括树脂或陶瓷的绝缘板中形成通孔; 同时在绝缘板的顶表面上形成用于第一上再分配层的抗蚀剂，以及在绝缘板的底表面上的下再分布层的电阻器; 电镀铜以填充通孔并同时沿着设计的电路图形形成第一上再分配层和下再分布层; 以及形成第一上保护层和下保护层以暴露所述第一上再分布层的一部分和所述下再分布层的一部分。

公开(公告)号：US09173291B2

公开(公告)日：2015-10-27

申请号：US14060345

申请日：2013-10-22

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Sung Han ,  Young Do Kweon ,  Jin Gu Kim ,  Hyung Jin Jeon ,  Yoon Su Kim

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/42

CPC classification number: H05K1/116 ,  H05K1/113 ,  H05K3/0017 ,  H05K3/002 ,  H05K3/421 ,  H05K2201/0195 ,  H05K2201/09563 ,  H05K2201/09854 ,  H05K2203/0733

Abstract: The present invention relates to a circuit board. A circuit board in accordance with an embodiment of the present invention includes a base substrate; an interlayer insulating layer covering the base substrate; a via structure passing through at least the interlayer insulating layer of the base substrate and the interlayer insulating layer in the vertical direction; and an etch stop pattern disposed on the interlayer insulating layer in the horizontal direction to surround the via structure and made of an insulating material.

Abstract translation: 本发明涉及一种电路板。 根据本发明实施例的电路板包括：基底; 覆盖基底的层间绝缘层; 通孔结构至少穿过基底衬底的层间绝缘层和层间绝缘层在垂直方向上; 以及在水平方向上设置在层间绝缘层上以围绕通孔结构并由绝缘材料制成的蚀刻停止图案。

公开(公告)号：US20130333202A1

公开(公告)日：2013-12-19

申请号：US13804250

申请日：2013-03-14

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sang Moon Lee ,  Young Seuck Yoo ,  Jong Yun Lee ,  Young Do Kweon ,  Sung Kwon Wi

IPC: H01F41/02

CPC classification number: H01F41/02 ,  H01F41/041 ,  Y10T29/4902 ,  Y10T29/49048 ,  Y10T29/49064 ,  Y10T29/49124 ,  Y10T29/49204

Abstract: Disclosed herein is a method for manufacturing a high frequency inductor, the method including; forming a primary coil for manufacturing the high frequency inductor on a wafer; coating a primary PSV on the wafer on which the primary coil is formed; forming a secondary coil for manufacturing the high frequency inductor, after the coating of the primary PSV; coating a secondary PSV, after the forming of the secondary coil; forming a barrier layer on an electrode portion to be exposed of the high frequency inductor, after the coating of the secondary PSV; filling and curing an insulating resin on the wafer, after the forming of the barrier layer; and polishing the cured resin up to the barrier layer to expose the electrode.

Abstract translation: 本文公开了一种制造高频电感器的方法，该方法包括： 形成用于在晶片上制造高频电感器的初级线圈; 在其上形成初级线圈的晶片上涂覆初级PSV; 在主PSV的涂覆之后形成用于制造高频电感器的次级线圈; 在形成次级线圈之后涂覆次级PSV; 在第二PSV的涂覆之后，在要暴露于高频电感器的电极部分上形成阻挡层; 在形成阻挡层之后，在晶片上填充和固化绝缘树脂; 并将固化树脂抛光至阻挡层，以露出电极。

公开(公告)号：US09577598B2

公开(公告)日：2017-02-21

申请号：US13830916

申请日：2013-03-14

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Young Seuck Yoo ,  Kang Heon Hur ,  Young Ghyu Ahn ,  Chan Yoon ,  Sung Kwon Wi ,  Jeong Min Cho ,  Geon Se Chang ,  Young Do Kweon

IPC: H03H7/01 ,  H03H7/42 ,  H01F17/00 ,  H03H1/00

CPC classification number: H03H7/0138 ,  H01F17/0013 ,  H01F2017/0066 ,  H01F2017/0093 ,  H03H7/427 ,  H03H2001/0057

Abstract: Disclosed herein is a thin film type common mode filter including: a base substrate made of an insulating material; a first insulating layer formed on the base substrate; a coil-shaped internal electrode formed on the first insulating layer; a second insulating layer formed on the internal electrode; an external electrode terminal having a vertical section connected to a side surface of the internal electrode and a horizontal section extended from an upper end of the vertical section toward a horizontal direction to thereby form a parallel surface spaced apart from the internal electrode by a predetermined distance; and a ferrite resin layer formed between the horizontal section of the external electrode terminal and the internal electrode.

Abstract translation: 本文公开了一种薄膜型共模滤光器，包括：由绝缘材料制成的基底; 形成在所述基底基板上的第一绝缘层; 形成在所述第一绝缘层上的线圈状内部电极; 形成在所述内部电极上的第二绝缘层; 具有连接到内部电极的侧表面的垂直部分的外部电极端子和从垂直部分的上端向水平方向延伸的水平部分，从而形成与内部电极间隔预定距离的平行表面 ; 以及在外部电极端子的水平部分和内部电极之间形成的铁氧体树脂层。

公开(公告)号：US09520223B2

公开(公告)日：2016-12-13

申请号：US14223567

申请日：2014-03-24

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Young Seuck Yoo ,  Kang Heon Hur ,  Jin Hyuck Yang ,  Sung Kwon Wi ,  Jong Yun Lee ,  Young Do Kweon

IPC: H01F5/00 ,  H01F27/30 ,  H01F27/28 ,  H01F27/02 ,  H01F27/255 ,  H01F41/04 ,  H01F27/29

CPC classification number: H01F27/2804 ,  H01F27/022 ,  H01F27/255 ,  H01F27/292 ,  H01F41/046 ,  H01F2027/2809 ,  Y10T29/4902

Abstract: The present invention relates to an inductor. An inductor in accordance with an embodiment of the present invention includes: an insulating layer having a hole; a conductive pattern disposed on both surfaces of the insulating layer and having a structure in which portions disposed on the both surfaces are electrically connected to each other through the hole; and a magnetic layer disposed on the insulating layer to cover the conductive pattern, wherein the conductive pattern has a plating pattern formed by performing a plating process.

Abstract translation: 本发明涉及电感器。 根据本发明实施例的电感器包括：具有孔的绝缘层; 设置在所述绝缘层的两个表面上并具有其中设置在所述两个表面上的部分通过所述孔彼此电连接的结构的导电图案; 以及设置在所述绝缘层上以覆盖所述导电图案的磁性层，其中所述导电图案具有通过进行电镀工艺形成的电镀图案。

公开(公告)号：US09183979B2

公开(公告)日：2015-11-10

申请号：US13725478

申请日：2012-12-21

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Hye Yeon Cha ,  Kang Heon Hur ,  Sung Jin Park ,  Dong Jin Jeong ,  Jung Min Park ,  Hyeog Soo Shin ,  Sung Yong An ,  Hwan Soo Lee ,  Young Do Kweon ,  Jin Woo Hahn

IPC: H01F5/00 ,  H01F27/29 ,  H01F41/04 ,  H01F17/00

CPC classification number: H01F27/29 ,  H01F5/00 ,  H01F17/0033 ,  H01F27/292 ,  H01F41/041 ,  H01F41/046 ,  Y10T29/4902

Abstract: The present invention relates to a chip inductor including: a metal-polymer composite in which metal particles and polymer are mixed; a wiring pattern provided inside the metal-polymer composite to form a coil; an external electrode provided in a portion of an outer peripheral surface of the metal-polymer composite; and an insulating portion provided between the metal-polymer composite and the wiring pattern and between the metal-polymer composite and the external electrode, and a method for manufacturing the same.

Abstract translation: 芯片电感器技术领域本发明涉及一种芯片电感器，包括：金属 - 聚合物复合体，其中金属颗粒和聚合物混合; 设置在金属 - 聚合物复合材料内部以形成线圈的布线图案; 设置在所述金属 - 聚合物复合材料的外周表面的一部分中的外部电极; 以及设置在金属 - 聚合物复合物和布线图案之间以及金属 - 聚合物复合材料和外部电极之间的绝缘部分及其制造方法。

公开(公告)号：US08981889B2

公开(公告)日：2015-03-17

申请号：US13831620

申请日：2013-03-15

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Young Seuck Yoo ,  Kang Heon Hur ,  Jun Hee Bae ,  Yong Suk Kim ,  Sang Moon Lee ,  Won Chul Sim ,  Young Do Kweon ,  Sung Kwon Wi

IPC: H01F17/00 ,  H01F5/00 ,  H01F27/28 ,  H01F27/24 ,  H01F27/40

CPC classification number: H01F27/40 ,  H01F17/0013 ,  H01F2017/0026 ,  H01F2017/0066

Abstract: Disclosed herein is a common mode filter with an ESD protection pattern built therein. The common mode filter includes a base substrate that is made of an insulating material, a first insulating layer that is formed on the base substrate, a coil-shaped internal electrode that is formed on the first insulating layer, a second insulating layer that is formed on the internal electrode, a first external electrode terminal that is formed on the second insulating layer, a first ferrite resin layer that is formed on the second insulating layer and receives the first external electrode terminal, an ESD protection pattern that is formed on the first external electrode terminal, a second external electrode terminal that is formed on the ESD protection pattern, and a second ferrite resin layer that is formed on the first ferrite resin layer and receives the second external electrode terminal.

Abstract translation: 这里公开了内置ESD保护图案的共模滤波器。 共模滤波器包括由绝缘材料制成的基底基板，形成在基底基板上的第一绝缘层，形成在第一绝缘层上的线圈状内部电极，形成的第二绝缘层 在内部电极上，形成在第二绝缘层上的第一外部电极端子，形成在第二绝缘层上并接收第一外部电极端子的第一铁氧体树脂层，形成在第一绝缘层上的ESD保护图案 外部电极端子，形成在ESD保护图案上的第二外部电极端子和形成在第一铁氧体树脂层上并接收第二外部电极端子的第二铁氧体树脂层。