Technique for compensating for a difference in deposition behavior in an interlayer dielectric material
    4.
    发明授权
    Technique for compensating for a difference in deposition behavior in an interlayer dielectric material 有权
    补偿层间电介质材料沉积行为差异的技术

    公开(公告)号:US07785956B2

    公开(公告)日:2010-08-31

    申请号:US12168443

    申请日:2008-07-07

    IPC分类号: H01L21/8238

    摘要: By selectively providing a buffer layer having an appropriate thickness, height differences occurring during the deposition of an SACVD silicon dioxide may be reduced during the formation of an interlayer dielectric stack of advanced semiconductor devices. The buffer material may be selectively provided after the deposition of contact etch stop layers of both types of internal stress or may be provided after the deposition of one type of dielectric material and may be used during the subsequent patterning of the other type of dielectric stop material as an efficient etch stop layer.

    摘要翻译: 通过选择性地提供具有适当厚度的缓冲层,在形成先进的半导体器件的层间电介质叠层的过程中,可以减少沉积SACVD二氧化硅期间出现的高度差异。 可以在沉积两种类型的内部应力的接触蚀刻停止层之后选择性地提供缓冲材料,或者可以在沉积一种类型的电介质材料之后提供缓冲材料,并且可以在随后的其它类型的电介质停止材料的图案化期间使用缓冲材料 作为有效的蚀刻停止层。

    TECHNIQUE FOR COMPENSATING FOR A DIFFERENCE IN DEPOSITION BEHAVIOR IN AN INTERLAYER DIELECTRIC MATERIAL
    6.
    发明申请
    TECHNIQUE FOR COMPENSATING FOR A DIFFERENCE IN DEPOSITION BEHAVIOR IN AN INTERLAYER DIELECTRIC MATERIAL 有权
    用于补偿中间层介质材料中沉积行为差异的技术

    公开(公告)号:US20100285668A1

    公开(公告)日:2010-11-11

    申请号:US12841313

    申请日:2010-07-22

    IPC分类号: H01L21/311 H01L21/31

    摘要: By selectively providing a buffer layer having an appropriate thickness, height differences occurring during the deposition of an SACVD silicon dioxide may be reduced during the formation of an interlayer dielectric stack of advanced semiconductor devices. The buffer material may be selectively provided after the deposition of contact etch stop layers of both types of internal stress or may be provided after the deposition of one type of dielectric material and may be used during the subsequent patterning of the other type of dielectric stop material as an efficient etch stop layer.

    摘要翻译: 通过选择性地提供具有适当厚度的缓冲层,在形成先进的半导体器件的层间电介质叠层的过程中,可以减少沉积SACVD二氧化硅期间出现的高度差异。 可以在沉积两种类型的内部应力的接触蚀刻停止层之后选择性地提供缓冲材料,或者可以在沉积一种类型的电介质材料之后提供缓冲材料,并且可以在随后的其它类型的电介质停止材料的图案化期间使用缓冲材料 作为有效的蚀刻停止层。

    Technique for compensating for a difference in deposition behavior in an interlayer dielectric material
    7.
    发明授权
    Technique for compensating for a difference in deposition behavior in an interlayer dielectric material 有权
    补偿层间电介质材料沉积行为差异的技术

    公开(公告)号:US07875514B2

    公开(公告)日:2011-01-25

    申请号:US12841313

    申请日:2010-07-22

    IPC分类号: H01L21/8238

    摘要: By selectively providing a buffer layer having an appropriate thickness, height differences occurring during the deposition of an SACVD silicon dioxide may be reduced during the formation of an interlayer dielectric stack of advanced semiconductor devices. The buffer material may be selectively provided after the deposition of contact etch stop layers of both types of internal stress or may be provided after the deposition of one type of dielectric material and may be used during the subsequent patterning of the other type of dielectric stop material as an efficient etch stop layer.

    摘要翻译: 通过选择性地提供具有适当厚度的缓冲层,在形成先进的半导体器件的层间电介质叠层的过程中,可以减少沉积SACVD二氧化硅期间出现的高度差异。 可以在沉积两种类型的内部应力的接触蚀刻停止层之后选择性地提供缓冲材料,或者可以在沉积一种类型的电介质材料之后提供缓冲材料,并且可以在随后的其它类型的电介质停止材料的图案化期间使用缓冲材料 作为有效的蚀刻停止层。

    TECHNIQUE FOR COMPENSATING FOR A DIFFERENCE IN DEPOSITION BEHAVIOR IN AN INTERLAYER DIELECTRIC MATERIAL
    9.
    发明申请
    TECHNIQUE FOR COMPENSATING FOR A DIFFERENCE IN DEPOSITION BEHAVIOR IN AN INTERLAYER DIELECTRIC MATERIAL 有权
    用于补偿中间层介质材料中沉积行为差异的技术

    公开(公告)号:US20090087999A1

    公开(公告)日:2009-04-02

    申请号:US12168443

    申请日:2008-07-07

    IPC分类号: H01L21/31

    摘要: By selectively providing a buffer layer having an appropriate thickness, height differences occurring during the deposition of an SACVD silicon dioxide may be reduced during the formation of an interlayer dielectric stack of advanced semiconductor devices. The buffer material may be selectively provided after the deposition of contact etch stop layers of both types of internal stress or may be provided after the deposition of one type of dielectric material and may be used during the subsequent patterning of the other type of dielectric stop material as an efficient etch stop layer.

    摘要翻译: 通过选择性地提供具有适当厚度的缓冲层,在形成先进的半导体器件的层间电介质叠层的过程中,可以减少沉积SACVD二氧化硅期间出现的高度差异。 可以在沉积两种类型的内部应力的接触蚀刻停止层之后选择性地提供缓冲材料,或者可以在沉积一种类型的电介质材料之后提供缓冲材料,并且可以在随后的其它类型的电介质停止材料的图案化期间使用缓冲材料 作为有效的蚀刻停止层。