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    MAGNETIC FIELD SENSING USING MAGNETORESISTIVE RANDOM ACCESS MEMORY (MRAM) CELLS
    5.
    发明申请
    MAGNETIC FIELD SENSING USING MAGNETORESISTIVE RANDOM ACCESS MEMORY (MRAM) CELLS 有权
    使用磁阻随机存取存储器（MRAM）电池进行磁场感测

    公开(公告)号：US20140029334A1

    公开(公告)日：2014-01-30

    申请号：US13561478

    申请日：2012-07-30

    Applicant: Romney R. Katti ,  Michael A. Smith

    Inventor： Romney R. Katti ,  Michael A. Smith

    IPC: G11C11/16

    CPC classification number: G11C11/1675 ,  G11C11/16 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1697 ,  G11C29/04

    Abstract: A magnetic field sensing system includes one or more magnetoresistive random access memory (MRAM) cells, and may be configured to determine one or more of a presence, a magnitude, and a polarity of an external magnetic field incident upon an MRAM cell. In some examples, a control module of the system controls a write current source, or another device, to provide a write current through a write line associated with the MRAM cell to induce a magnetic field proximate to the MRAM cell. The magnetic field may be less than a magnetic switching threshold of the MRAM cell. After initiating the provision of the write current through the write line, the control module may determine a magnetic state of the MRAM cell, and determine a presence of an external magnetic field incident upon the MRAM cell based at least in part on the magnetic state of the MRAM cell.

    Abstract translation: 磁场感测系统包括一个或多个磁阻随机存取存储器（MRAM）单元，并且可以被配置为确定入射到MRAM单元上的外部磁场的存在，大小和极性中的一个或多个。 在一些示例中，系统的控制模块控制写入电流源或另一个器件，以通过与MRAM单元相关联的写入线提供写入电流，以引导靠近MRAM单元的磁场。 磁场可能小于MRAM单元的磁切换阈值。 在开始通过写入线提供写入电流之后，控制模块可以确定MRAM单元的磁状态，并且至少部分地基于MRAM单元的磁状态来确定入射到MRAM单元上的外部磁场的存在 MRAM单元。

    Configurable reference circuit for logic gates
    7.
    发明授权
    Configurable reference circuit for logic gates 有权
    用于逻辑门的可配置参考电路

    公开(公告)号：US08427197B2

    公开(公告)日：2013-04-23

    申请号：US13161070

    申请日：2011-06-15

    Applicant: Romney R. Katti

    Inventor： Romney R. Katti

    IPC: H03K17/16 ,  H03K19/003

    CPC classification number: H03K19/16

    Abstract: This disclosure is directed to techniques for generating a reference current based on a combinational logic function that is to be performed by a magnetic logic device. A comparator circuit may compare an amplitude of a read current that flows through the magnetic logic device and the reference current to generate a logic output value that corresponds to the logic output value when combinational logic function is applied to the input values. By selecting appropriate amplitudes for the reference current the magnetic logic device may be caused to implement different combinational logic functions.

    Abstract translation: 本公开涉及用于基于将由磁逻辑器件执行的组合逻辑功能来产生参考电流的技术。 比较器电路可以比较流过磁逻辑器件的读取电流的幅度和参考电流，以便当将组合逻辑功能应用于输入值时产生对应于逻辑输出值的逻辑输出值。 通过为参考电流选择适当的幅度，可以使磁逻辑器件实现不同的组合逻辑功能。

    Magnetic logic gate
    8.
    发明授权
    Magnetic logic gate 有权
    磁逻辑门

    公开(公告)号：US08358149B2

    公开(公告)日：2013-01-22

    申请号：US12916119

    申请日：2010-10-29

    Applicant: Romney R. Katti

    Inventor： Romney R. Katti

    IPC: H03K19/173

    CPC classification number: H03K19/16 ,  G11C11/161 ,  H03K19/195

    Abstract: This disclosure is directed to a magnetic logic device for implementing a combinational logic function. The magnetic logic device may include a chain of at least two magnetoresistive devices electrically coupled in series comprising a first terminal located at a first end of the chain and a second terminal located at a second end of the chain. The magnetic logic device may further include a voltage source configured to apply a voltage between the first terminal and the second terminal of the chain of at least two magnetoresistive devices electrically coupled in series. The magnetic logic device may further include a logic output generator configured to generate a logic output value for a logic function based on a magnitude of a current produced at the second terminal of the chain in response to the applied voltage.

    Abstract translation: 本公开涉及用于实现组合逻辑功能的磁逻辑器件。 磁逻辑器件可以包括串联电耦合的至少两个磁阻器件的链，包括位于链的第一端的第一端子和位于链的第二端的第二端子。 磁逻辑器件还可以包括电压源，其被配置为在串联电耦合的至少两个磁阻器件的链的第一端子和第二端子之间施加电压。 磁逻辑器件还可以包括逻辑输出发生器，其被配置为基于响应于所施加的电压在链的第二端产生的电流的大小来产生逻辑功能的逻辑输出值。

    MAGNETIC LOGIC GATE
    10.
    发明申请
    MAGNETIC LOGIC GATE 有权
    磁性逻辑门

    公开(公告)号：US20120105103A1

    公开(公告)日：2012-05-03

    申请号：US12916174

    申请日：2010-10-29

    Applicant: Romney R. Katti

    Inventor： Romney R. Katti

    IPC: H03K19/173

    CPC classification number: H03K19/16 ,  H03K19/168

    Abstract: This disclosure is directed to a magnetic logic device for implementing a combinational logic function. The magnetic logic device may include a network of at least two magnetoresistive devices electrically coupled in parallel. The magnetic logic device may further include a voltage source configured to apply a voltage between a first terminal and a second terminal of the network of at least two magnetoresistive devices electrically coupled in parallel. The magnetic logic device may further include a logic output generator configured to generate a logic output value for a logic function based on a magnitude of a current produced at the second terminal of the network in response to the applied voltages.

    Abstract translation: 本公开涉及用于实现组合逻辑功能的磁逻辑器件。 磁逻辑器件可以包括并联电耦合的至少两个磁阻器件的网络。 磁逻辑器件还可以包括被配置为在电耦合并联的至少两个磁阻器件的网络的第一端子和第二端子之间施加电压的电压源。 磁逻辑器件还可包括逻辑输出发生器，该逻辑输出发生器被配置为响应于所施加的电压，基于在网络的第二终端处产生的电流的幅度来产生用于逻辑功能的逻辑输出值。

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