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公开(公告)号:US10559623B2
公开(公告)日:2020-02-11
申请号:US16420126
申请日:2019-05-22
发明人: Takeshi Kamino , Takahiro Tomimatsu
IPC分类号: H01L27/146 , H01L21/28 , H04N5/374 , H01L29/66 , H01L21/266 , H01L21/285
摘要: An offset spacer film (OSS) is formed on a side wall surface of a gate electrode (NLGE, PLGE) to cover a region in which a photo diode (PD) is disposed. Next, an extension region (LNLD, LPLD) is formed using the offset spacer film and the like as an implantation mask. Next, process is provided to remove the offset spacer film covering the region in which the photo diode is disposed. Next, a sidewall insulating film (SWI) is formed on the side wall surface of the gate electrode. Next, a source-drain region (HPDF, LPDF, HNDF, LNDF) is formed using the sidewall insulating film and the like as an implantation mask.
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公开(公告)号:US20190280041A1
公开(公告)日:2019-09-12
申请号:US16420126
申请日:2019-05-22
发明人: Takeshi Kamino , Takahiro Tomimatsu
IPC分类号: H01L27/146 , H04N5/374 , H01L29/66 , H01L21/266 , H01L21/285 , H01L21/28
摘要: An offset spacer film (OSS) is formed on a side wall surface of a gate electrode (NLGE, PLGE) to cover a region in which a photo diode (PD) is disposed. Next, an extension region (LNLD, LPLD) is formed using the offset spacer film and the like as an implantation mask. Next, process is provided to remove the offset spacer film covering the region in which the photo diode is disposed. Next, a sidewall insulating film (SWI) is formed on the side wall surface of the gate electrode. Next, a source-drain region (HPDF, LPDF, HNDF, LNDF) is formed using the sidewall insulating film and the like as an implantation mask.
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公开(公告)号:US20180040664A1
公开(公告)日:2018-02-08
申请号:US15788695
申请日:2017-10-19
发明人: Takeshi Kamino , Takahiro Tomimatsu
IPC分类号: H01L27/146 , H01L21/28 , H01L21/266 , H01L21/285 , H04N5/374 , H01L29/66
CPC分类号: H01L27/14689 , H01L21/266 , H01L21/28123 , H01L21/28518 , H01L27/1461 , H01L27/14612 , H01L27/1462 , H01L27/14685 , H01L29/665 , H04N5/374
摘要: An offset spacer film (OSS) is formed on a side wall surface of a gate electrode (NLGE, PLGE) to cover a region in which a photo diode (PD) is disposed. Next, an extension region (LNLD, LPLD) is formed using the offset spacer film and the like as an implantation mask. Next, process is provided to remove the offset spacer film covering the region in which the photo diode is disposed. Next, a sidewall insulating film (SWI) is formed on the side wall surface of the gate electrode. Next, a source-drain region (HPDF, LPDF, HNDF, LNDF) is formed using the sidewall insulating film and the like as an implantation mask.
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公开(公告)号:US20170125478A1
公开(公告)日:2017-05-04
申请号:US15404320
申请日:2017-01-12
发明人: Takeshi Kamino , Takahiro Tomimatsu
IPC分类号: H01L27/146 , H01L21/285 , H01L29/66 , H01L21/266 , H01L21/28
CPC分类号: H01L27/14689 , H01L21/266 , H01L21/28123 , H01L21/28518 , H01L27/1461 , H01L27/14612 , H01L27/1462 , H01L27/14685 , H01L29/665 , H04N5/374
摘要: An offset spacer film (OSS) is formed on a side wall surface of a gate electrode (NLGE, PLGE) to cover a region in which a photo diode (PD) is disposed. Next, an extension region (LNLD, LPLD) is formed using the offset spacer film and the like as an implantation mask. Next, process is provided to remove the offset spacer film covering the region in which the photo diode is disposed. Next, a sidewall insulating film (SWI) is formed on the side wall surface of the gate electrode. Next, a source-drain region (HPDF, LPDF, HNDF, LNDF) is formed using the sidewall insulating film and the like as an implantation mask.
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公开(公告)号:US09991297B2
公开(公告)日:2018-06-05
申请号:US15200803
申请日:2016-07-01
发明人: Koji Iizuka , Takahiro Tomimatsu
IPC分类号: H01L27/148 , H01L27/146 , H01L21/00
CPC分类号: H01L27/14605 , H01L27/1461 , H01L27/1462 , H01L27/1463 , H01L27/14645 , H01L27/14689 , H01L27/14698
摘要: An imaging device is provided, in which the dynamic range of still pictures can be suppressed from being decreased. In the imaging device, a photodiode including an n-type impurity region and a photodiode including an n-type impurity region are formed in a p-type well. An n-type impurity region is formed between the n-type impurity region on one side and that on the other side so as to contact each of the two. The impurity concentration of the last-formed n-type impurity region is set to be lower than those of the first-formed n-type impurity regions.
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公开(公告)号:US09076857B2
公开(公告)日:2015-07-07
申请号:US13740783
申请日:2013-01-14
发明人: Takahiro Tomimatsu
IPC分类号: H01L29/51 , H01L29/78 , H01L29/66 , H01L21/8238 , H01L21/28
CPC分类号: H01L29/513 , H01L21/28185 , H01L21/823857 , H01L29/518 , H01L29/66477 , H01L29/66545 , H01L29/78
摘要: Over a semiconductor substrate, a gate insulating film including an interfacial layer, a HfON film, and a HfSiON film is formed. Then, over the HfSiON film, an Al-containing film and a mask layer are formed. Subsequently, the mask layer and the Al-containing film are selectively removed from an n-channel MISFET formation region. Then, a rare-earth-element-containing film is formed over the HfSiON film in the n-channel MISFET formation region and over the mask layer in a p-channel MISFET formation region. Heat treatment is performed to cause a reaction between each of the HfON film and the HfSiON film and the rare-earth-element-containing film in the n-channel MISFET formation region and cause a reaction between each of the HfON film and the HfSiON film and the Al-containing film in the p-channel MISFET formation region. Thereafter, the unreacted rare-earth-element-containing film and the mask layer are removed, and then metal gate electrodes are formed.
摘要翻译: 在半导体衬底上形成包括界面层,HfON膜和HfSiON膜的栅极绝缘膜。 然后,在HfSiON膜上形成含Al膜和掩模层。 随后,从n沟道MISFET形成区域选择性地去除掩模层和含Al膜。 然后,在n沟道MISFET形成区域中的HfSiON膜上并且在p沟道MISFET形成区域中的掩模层之上形成含稀土元素的膜。 进行热处理以在n沟道MISFET形成区域中引起HfON膜和HfSiON膜和含稀土元素的膜之间的反应,并引起HfON膜和HfSiON膜中的每一个之间的反应 以及p沟道MISFET形成区域中的含Al膜。 此后,除去未反应的含稀土元素膜和掩模层,然后形成金属栅电极。
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公开(公告)号:US20180301503A1
公开(公告)日:2018-10-18
申请号:US16014774
申请日:2018-06-21
发明人: Takeshi Kamino , Takahiro Tomimatsu
IPC分类号: H01L27/146 , H04N5/374 , H01L29/66 , H01L21/266 , H01L21/285 , H01L21/28
CPC分类号: H01L27/14689 , H01L21/266 , H01L21/28123 , H01L21/28518 , H01L27/1461 , H01L27/14612 , H01L27/1462 , H01L27/14685 , H01L29/665 , H04N5/374
摘要: An offset spacer film (OSS) is formed on a side wall surface of a gate electrode (NLGE, PLGE) to cover a region in which a photo diode (PD) is disposed. Next, an extension region (LNLD, LPLD) is formed using the offset spacer film and the like as an implantation mask. Next, process is provided to remove the offset spacer film covering the region in which the photo diode is disposed. Next, a sidewall insulating film (SWI) is formed on the side wall surface of the gate electrode. Next, a source-drain region (HPDF, LPDF, HNDF, LNDF) is formed using the sidewall insulating film and the like as an implantation mask.
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公开(公告)号:US09806126B2
公开(公告)日:2017-10-31
申请号:US15404320
申请日:2017-01-12
发明人: Takeshi Kamino , Takahiro Tomimatsu
IPC分类号: H01L27/146 , H01L21/28 , H04N5/374 , H01L21/266 , H01L21/285 , H01L29/66
CPC分类号: H01L27/14689 , H01L21/266 , H01L21/28123 , H01L21/28518 , H01L27/1461 , H01L27/14612 , H01L27/1462 , H01L27/14685 , H01L29/665 , H04N5/374
摘要: An offset spacer film (OSS) is formed on a side wall surface of a gate electrode (NLGE, PLGE) to cover a region in which a photo diode (PD) is disposed. Next, an extension region (LNLD, LPLD) is formed using the offset spacer film and the like as an implantation mask. Next, process is provided to remove the offset spacer film covering the region in which the photo diode is disposed. Next, a sidewall insulating film (SWI) is formed on the side wall surface of the gate electrode. Next, a source-drain region (HPDF, LPDF, HNDF, LNDF) is formed using the sidewall insulating film and the like as an implantation mask.
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公开(公告)号:US09698187B2
公开(公告)日:2017-07-04
申请号:US14894298
申请日:2013-06-14
发明人: Takahiro Tomimatsu
IPC分类号: H01L29/49 , H01L27/146
CPC分类号: H01L27/14614 , H01L27/14612 , H01L27/1462 , H01L27/14627 , H01L27/1463 , H01L27/14636 , H01L27/14643 , H01L27/14687 , H01L27/14689
摘要: A gate electrode of a field effect transistor is formed. Next, an offset spacer film with a double-layer structure including a silicon oxide film as a lower-layer film and a silicon nitride film as an upper-layer film is formed on a sidewall surface of the gate electrode. The silicon nitride film serves as a supply source of an element for terminating dangling bonds of silicon in a device formation region. Next, treatment for leaving the offset spacer film intact or treatment for removing the silicon nitride film of the offset spacer film is performed. Thereafter, a sidewall insulating film is formed on the sidewall surface of the gate electrode.
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公开(公告)号:US10319779B2
公开(公告)日:2019-06-11
申请号:US16014774
申请日:2018-06-21
发明人: Takeshi Kamino , Takahiro Tomimatsu
IPC分类号: H01L27/146 , H01L21/28 , H04N5/374 , H01L21/266 , H01L21/285 , H01L29/66
摘要: An offset spacer film (OSS) is formed on a side wall surface of a gate electrode (NLGE, PLGE) to cover a region in which a photo diode (PD) is disposed. Next, an extension region (LNLD, LPLD) is formed using the offset spacer film and the like as an implantation mask. Next, process is provided to remove the offset spacer film covering the region in which the photo diode is disposed. Next, a sidewall insulating film (SWI) is formed on the side wall surface of the gate electrode. Next, a source-drain region (HPDF, LPDF, HNDF, LNDF) is formed using the sidewall insulating film and the like as an implantation mask.
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