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公开(公告)号:US20190215518A1
公开(公告)日:2019-07-11
申请号:US15866582
申请日:2018-01-10
Applicant: QUALCOMM Incorporated
Inventor: Aravind Alagappan , Marc Bosch Ruiz , Yu Liu , Shyamprasad Chikkerur , Yunqing Chen , Tushar Singhal , Shu Lin , Kai Wang , Harikrishna Reddy
IPC: H04N19/139 , G06T7/269 , H04N19/53 , G06T7/207
CPC classification number: H04N19/139 , G06T7/207 , G06T7/269 , H04N19/53
Abstract: Methods, systems, and devices for motion analysis are described. Generally, the described techniques provide for computationally efficient and accurate motion analysis. A device may identify frames of a video frame sequence having a defined resolution. The device may downscale the frames to generate a plurality of downsampled images each having a resolution lower than the defined resolution. The device may generate a respective histogram vector for each pixel of each downsampled image and each pixel of the original frames. The device may determine a motion vector candidate based at least in part on the histogram vectors. The device may apply a filter to the motion vector candidates to determine a final motion vector and output an indication of motion between the frames of the video frame sequence based at least in part on the final motion vector for each pixel of the second frame.
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公开(公告)号:US20240305785A1
公开(公告)日:2024-09-12
申请号:US18457079
申请日:2023-08-28
Applicant: QUALCOMM Incorporated
Inventor: Ties Jehan Van Rozendaal , Hoang Cong Minh Le , Tushar Singhal , Amir Said , Krishna Buska , Guillaume Konrad Sautiere , Anjuman Raha , Auke Joris Wiggers , Frank Steven Mayer , Liang Zhang , Abhijit Khobare , Muralidhar Reddy Akula
IPC: H04N19/137 , H04N19/159 , H04N19/176 , H04N19/192
CPC classification number: H04N19/137 , H04N19/159 , H04N19/176 , H04N19/192
Abstract: An example computing device may include memory and one or more processors. The one or more processors may be configured to parallel entropy decode encoded video data from a received bitstream to generate entropy decoded data. The one or more processors may be configured to predict a motion vector based on the entropy decoded data. The one or more processors may be configured to decode a motion vector residual from the entropy decoded data. The one or more processors may be configured to add the motion vector residual and motion vector. The one or more processors may be configured to warp previous reconstructed video data with an overlapped block-based warp function using the motion vector to generate predicted current video data. The one or more processors may be configured to sum the predicted current video data with a residual block to generate current reconstructed video data.
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公开(公告)号:US10567800B2
公开(公告)日:2020-02-18
申请号:US15451944
申请日:2017-03-07
Applicant: QUALCOMM Incorporated
Inventor: Yunqing Chen , Srikanth Alaparthi , Tushar Singhal , Harikrishna Reddy , Ashish Mishra
IPC: H04N19/61 , H04N19/423
Abstract: Techniques are described for performing transformation on video data. A transform circuit may receive M sample values of the video data from a pre-transform buffer, and process the M sample values with N computation units of the transform circuit to generate intermediate values. Processing the M sample values to generate the intermediate values includes feeding back temporary values from output of one or more of the N computation units to input of one or more of the N computation units. The transform circuit may store a first set of the intermediate values in a transpose buffer, and store a second set of the intermediate values in the pre-transform buffer that are to be later retrieved for storage in the transpose buffer.
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公开(公告)号:US20180152732A1
公开(公告)日:2018-05-31
申请号:US15451944
申请日:2017-03-07
Applicant: QUALCOMM Incorporated
Inventor: Yunqing Chen , Srikanth Alaparthi , Tushar Singhal , Harikrishna Reddy , Ashish Mishra
CPC classification number: H04N19/61 , H04N19/423
Abstract: Techniques are described for performing transformation on video data. A transform circuit may receive M sample values of the video data from a pre-transform buffer, and process the M sample values with N computation units of the transform circuit to generate intermediate values. Processing the M sample values to generate the intermediate values includes feeding back temporary values from output of one or more of the N computation units to input of one or more of the N computation units. The transform circuit may store a first set of the intermediate values in a transpose buffer, and store a second set of the intermediate values in the pre-transform buffer that are to be later retrieved for storage in the transpose buffer.
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