公开(公告)号：US11175836B2

公开(公告)日：2021-11-16

申请号：US16803977

申请日：2020-02-27

Applicant: Qualcomm Incorporated

Inventor： Jungwon Suh ,  Dexter Tamio Chun ,  Michael Hawjing Lo ,  Shyamkumar Thoziyoor ,  Ravindra Kumar

IPC: G06F3/06 ,  G06F12/0875

Abstract: Methods and apparatuses for improve data clock to reduce power consumption are presented. The apparatus includes a memory configured to receive a data clock from a host via a link and to synchronize the data clock with the host. The memory includes a clock tree buffer configured to toggle based on the data clock to capture write data or to output read data and a command decoder configured to detect a data clock suspend command while the data clock is synchronized between the host and the memory. The clock tree buffer is configured to disable toggling based on the data clock in response to the command decoder detecting the data clock suspend command. the host includes a memory controller configured to provide a data clock suspend command to the memory via the link while the data clock is synchronized between the host and the memory.

公开(公告)号：US10726904B2

公开(公告)日：2020-07-28

申请号：US16362427

申请日：2019-03-22

Applicant: QUALCOMM Incorporated

Inventor： Jungwon Suh ,  Yanru Li ,  Michael Hawjing Lo ,  Dexter Tamio Chun

IPC: G11C13/06 ,  G11C11/406 ,  G11C7/10 ,  G11C8/12

Abstract: In a conventional memory subsystem, a memory controller issues explicit refresh commands to a DRAM memory device to maintain integrity of the data stored in the memory device when the memory device is in an auto-refresh mode. A significant amount of power may be consumed to carry out the refresh. To address this and other issues, it is proposed to allow a partial refresh in the auto-refresh mode in which the refreshing operation may be skipped for a subset of the memory cells. Through such selective refresh skipping, the power consumed for auto-refreshes may be reduced. Operating system kernels and memory drivers may be configured to determine areas of memory for which the refreshing operation can be skipped.

公开(公告)号：US20180225066A1

公开(公告)日：2018-08-09

申请号：US15944041

申请日：2018-04-03

Applicant: QUALCOMM Incorporated

Inventor： Olivier Alavoine ,  Sejoong Lee ,  Tauseef Kazi ,  Simon Booth ,  Edoardo Regini ,  Renatas Jakushokas ,  Saurabh Patodia ,  Jeffrey Gemar ,  Michael Hawjing Lo ,  Vinod Chamarty ,  Boris Andreev ,  Tao Shen ,  Aravind Bhaskara ,  Wenbiao Wang ,  Stephen Molloy

IPC: G06F3/06 ,  G06F1/32 ,  G06F12/08

CPC classification number: G06F3/0659 ,  G06F1/3275 ,  G06F3/0625 ,  G06F3/0673 ,  G06F12/08 ,  Y02D10/13 ,  Y02D10/14

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.

公开(公告)号：US11360897B1

公开(公告)日：2022-06-14

申请号：US17231867

申请日：2021-04-15

Applicant: QUALCOMM INCORPORATED

Inventor： Jungwon Suh ,  Pankaj Deshmukh ,  Michael Hawjing Lo ,  Shyamkumar Thoziyoor

IPC: G06F12/0831 ,  G06F12/0864 ,  G06F13/40 ,  G06F13/16 ,  G06F12/02

Abstract: Dynamic random access memory (DRAM) data may be accessed by a memory controller using a broadcast mode or a non-broadcast mode. In the broadcast mode, a first portion of data that is the subject of an access request and a second portion of the data that is the subject of the access request may be accessed concurrently via first and second pseudo-channels, respectively. In the non-broadcast mode, data that is the subject of the access request may be accessed via a selected one of the first and second pseudo-channels.

公开(公告)号：US20200278802A1

公开(公告)日：2020-09-03

申请号：US16803977

申请日：2020-02-27

Applicant: Qualcomm Incorporated

Inventor： Jungwon SUH ,  Dexter Tamio Chun ,  Michael Hawjing Lo ,  Shyamkumar Thoziyoor ,  Ravindra Kumar

IPC: G06F3/06 ,  G06F12/0875

Abstract: Methods and apparatuses for improve data clock to reduce power consumption are presented. The apparatus includes a memory configured to receive a data clock from a host via a link and to synchronize the data clock with the host. The memory includes a clock tree buffer configured to toggle based on the data clock to capture write data or to output read data and a command decoder configured to detect a data clock suspend command while the data clock is synchronized between the host and the memory. The clock tree buffer is configured to disable toggling based on the data clock in response to the command decoder detecting the data clock suspend command. the host includes a memory controller configured to provide a data clock suspend command to the memory via the link while the data clock is synchronized between the host and the memory.

公开(公告)号：US10332582B2

公开(公告)日：2019-06-25

申请号：US15667618

申请日：2017-08-02

Applicant: QUALCOMM Incorporated

Inventor： Jungwon Suh ,  Yanru Li ,  Michael Hawjing Lo ,  Dexter Tamio Chun

IPC: G11C7/00 ,  G11C11/406 ,  G11C7/10

Abstract: In a conventional memory subsystem, a memory controller issues explicit refresh commands to a DRAM memory device to maintain integrity of the data stored in the memory device when the memory device is in an auto-refresh mode. A significant amount of power may be consumed to carry out the refresh. To address this and other issues, it is proposed to allow a partial refresh in the auto-refresh mode in which the refreshing operation may be skipped for a subset of the memory cells. Through such selective refresh skipping, the power consumed for auto-refreshes may be reduced. Operating system kernels and memory drivers may be configured to determine areas of memory for which the refreshing operation can be skipped.

公开(公告)号：US10222853B2

公开(公告)日：2019-03-05

申请号：US15448327

申请日：2017-03-02

Applicant: QUALCOMM Incorporated

Inventor： Jungwon Suh ,  Dexter Tamio Chun ,  Michael Hawjing Lo

IPC: G06F1/32 ,  G11C7/10 ,  G06F12/06 ,  G06F13/16 ,  G06F1/3234 ,  G06F13/42 ,  G06F1/3225

Abstract: Power saving techniques for memory systems are disclosed. In particular, exemplary aspects of the present disclosure contemplate taking advantage of patterns that may exist within memory elements and eliminating duplicative data transfers. Specifically, if data is repetitive, instead of sending the same data repeatedly, the data may be sent only a single time with instructions that cause the data to be replicated at a receiving end to restore the data to its original repeated state.

公开(公告)号：US11662919B2

公开(公告)日：2023-05-30

申请号：US17494089

申请日：2021-10-05

Applicant: QUALCOMM Incorporated

Inventor： Jungwon Suh ,  Dexter Tamio Chun ,  Michael Hawjing Lo ,  Shyamkumar Thoziyoor ,  Ravindra Kumar

IPC: G06F3/06 ,  G06F12/0875

CPC classification number: G06F3/0625 ,  G06F3/0634 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0673 ,  G06F12/0875 ,  G06F2212/1028 ,  G06F2212/45

Abstract: Methods and apparatuses for improve data clock to reduce power consumption are presented. The apparatus includes a memory configured to receive a data clock from a host via a link and to synchronize the data clock with the host. The memory includes a clock tree buffer configured to toggle based on the data clock to capture write data or to output read data and a command decoder configured to detect a data clock suspend command while the data clock is synchronized between the host and the memory. The clock tree buffer is configured to disable toggling based on the data clock in response to the command decoder detecting the data clock suspend command. the host includes a memory controller configured to provide a data clock suspend command to the memory via the link while the data clock is synchronized between the host and the memory.

公开(公告)号：US11164618B2

公开(公告)日：2021-11-02

申请号：US16907103

申请日：2020-06-19

Applicant: QUALCOMM Incorporated

Inventor： Jungwon Suh ,  Yanru Li ,  Michael Hawjing Lo ,  Dexter Tamio Chun

IPC: G11C5/00 ,  G11C11/406 ,  G11C7/10 ,  G11C8/12

Abstract: In a conventional memory subsystem, a memory controller issues explicit refresh commands to a DRAM memory device to maintain integrity of the data stored in the memory device when the memory device is in an auto-refresh mode. A significant amount of power may be consumed to carry out the refresh. To address this and other issues, it is proposed to allow a partial refresh in the auto-refresh mode in which the refreshing operation may be skipped for a subset of the memory cells. Through such selective refresh skipping, the power consumed for auto-refreshes may be reduced. Operating system kernels and memory drivers may be configured to determine areas of memory for which the refreshing operation can be skipped.

公开(公告)号：US10761774B2

公开(公告)日：2020-09-01

申请号：US15944041

申请日：2018-04-03

Applicant: QUALCOMM Incorporated

Inventor： Olivier Alavoine ,  Sejoong Lee ,  Tauseef Kazi ,  Simon Booth ,  Edoardo Regini ,  Renatas Jakushokas ,  Saurabh Patodia ,  Jeffrey Gemar ,  Michael Hawjing Lo ,  Vinod Chamarty ,  Boris Andreev ,  Tao Shen ,  Aravind Bhaskara ,  Wenbiao Wang ,  Stephen Molloy

IPC: G06F1/32 ,  G06F12/08 ,  G06F3/06 ,  G06F1/3234

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.