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公开(公告)号:US11881862B2
公开(公告)日:2024-01-23
申请号:US17404919
申请日:2021-08-17
Applicant: QUALCOMM Incorporated
Inventor: Udayakiran Kumar Yallamaraju , Xia Li , Pankaj Deshmukh , Vajram Ghantasala , Bin Yang , Vishal Mishra , Bharatheesha Sudarshan Jagirdar , Arun Sundaresan Iyer , Amod Phadke , Vanamali Bhat
CPC classification number: H03K5/1565 , H03K5/134 , H03K19/20 , H03K2005/00195
Abstract: A system includes a first park circuit having a signal input, an output, and a control input. The system also includes a first signal path having an input and an output, wherein the input of the first signal path is coupled to the output of the first park circuit. The system also includes a second park circuit having a signal input, an output, and a control input, wherein the signal input of the second park circuit is coupled to the output of the first signal path. The system further includes a second signal path having an input and an output, wherein the input of the second signal path is coupled to the output of the second park circuit.
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公开(公告)号:US20240326867A1
公开(公告)日:2024-10-03
申请号:US18193912
申请日:2023-03-31
Applicant: QUALCOMM Incorporated
Inventor: Sriram Hariharan , Bohuslav Rychlik , Deepak Baranwal , Vinay Kumar Garipelli , Amod Phadke
CPC classification number: B60W60/0015 , B60W50/045 , G07C5/008 , B60W2050/046
Abstract: A processor-based system employing a safety island architecture for fail-safe operation and related methods are disclosed. The processor-based system includes a main domain for controlling a device. The main domain receives and processes vehicle information from a vehicle network. The main domain communicates with vehicle modules to control operation of the vehicle. Such operation may include different autonomous driving use cases. The processing system includes a safety island domain that includes less hardware circuits as in the main domain. The safety island domain is configured to checkpoint vehicle information processed by both the main and safety island domains and to monitor errors originating in both the main and safety island.
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公开(公告)号:US11327525B1
公开(公告)日:2022-05-10
申请号:US17127513
申请日:2020-12-18
Applicant: QUALCOMM Incorporated
Inventor: Federico Salluzzo , Sina Dena , Amod Phadke , Vanamali Bhat
Abstract: An apparatus including a serial clock routing pipeline including a first set of clock inputs and a clock output; a first set of clock generators including a first set of clock outputs coupled to the first set of clock inputs of the serial clock routing pipeline, respectively; and a first clock monitoring unit including a first clock input coupled to the clock output of the serial clock routing pipeline, and a first status output to provide information concerning one or more of the first set of clock generators. The apparatus may further include a set of phase locked loops (PLLs) coupled to the set of clock generators, respectively; the set of PLLs also coupled to the clock monitoring unit.
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