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公开(公告)号：US11652301B2
公开(公告)日：2023-05-16
申请号：US16379553
申请日：2019-04-09
Applicant: QUALCOMM Incorporated
Inventor： Taesik Yang , Jorge Fabrega Sanchez , Mohammad Ali Tassoudji , Kevin Hsi Huai Wang , Jeongil Jay Kim
CPC classification number: H01Q21/065 , H01Q1/2283 , H01Q5/364 , H01Q5/385
Abstract: Methods, systems, and devices for wireless communication are described. According to one or more aspects, the described apparatus includes one or more stacks of patch radiators (such as patch antennas) comprising at least a first patch radiator and a second patch radiator. The first patch radiator is associated with a low-band frequency; the second patch radiator is associated with a high-band frequency. The first patch radiator and the second patch radiator may overlap a ground plane, which may be asymmetric. Some or all patch radiators in a stack may be rotated relative to the ground plane, such that some or all edge of a patch radiator may be nonparallel with one or more edges of the ground plane. Further, each patch radiator stack may include separate feeds for each of at least two frequencies and two polarizations, and thus at least four feeds (one for each frequency/polarization combination) in total.
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公开(公告)号：US20200099144A1
公开(公告)日：2020-03-26
申请号：US16140127
申请日：2018-09-24
Applicant: Qualcomm Incorporated
Inventor： Li Liu , Kevin Hsi Huai Wang , Yunfei Feng , Chuan Wang , Gurkanwal Sahota
Abstract: An apparatus is disclosed for a hybrid wireless transceiver architecture that supports multiple antenna arrays. In an example aspect, the apparatus includes a first antenna array, a second antenna array, and a wireless transceiver. The wireless transceiver includes first dedicated circuitry dedicated to the first antenna array and second dedicated circuitry dedicated to the second antenna array. The wireless transceiver also includes shared circuitry that is shared with both the first antenna array and the second antenna array.
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公开(公告)号：US20190305740A1
公开(公告)日：2019-10-03
申请号：US16446492
申请日：2019-06-19
Applicant: Qualcomm Incorporated
Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
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公开(公告)号：US10122332B2
公开(公告)日：2018-11-06
申请号：US15607145
申请日：2017-05-26
Applicant: QUALCOMM Incorporated
Inventor： Serkan Sayilir , Chuan Wang , Kevin Hsi Huai Wang
IPC: H03F1/00 , H03F3/191 , H03F3/30 , H03F3/26 , H03H7/48 , H03F3/00 , H03F3/72 , H04B1/18 , H04L27/26
Abstract: A wireless communication device includes a first low-noise amplifier (LNA). The wireless communication device also includes a first LNA load circuit coupled to an output of the LNA. The wireless communication device further includes a power splitter switchably coupled to the first LNA load circuit. The power splitter includes a negatively coupled transformer and is switchably coupled to multiple outputs.
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公开(公告)号：US10008987B1
公开(公告)日：2018-06-26
申请号：US15583944
申请日：2017-05-01
Applicant: QUALCOMM Incorporated
Inventor： Serkan Sayilir , Chuan Wang , Li-chung Chang , Kevin Hsi Huai Wang
Abstract: A low noise amplifier (LNA) reduces matching and switch noise. The LNA includes a main radio frequency signal path, an auxiliary radio frequency signal path and a phase shifter. The main path includes a first transistor and an inductor. The inductor is positioned between an input port of the LNA and the first transistor. The first transistor receives an input radio frequency signal via the inductor and provides a first amplified signal based on the input radio frequency signal. The auxiliary radio frequency signal path provides a second amplified signal for a noise cancellation mode based on the input radio frequency signal. The phase shifter applies a phase shift to an output signal of the LNA based on the first amplified signal and the second amplified signal.
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Patent Agency Ranking
公开(公告)号：US20170187338A1
公开(公告)日：2017-06-29
申请号：US15188629
申请日：2016-06-21
Applicant: QUALCOMM Incorporated
Inventor： Chuan Wang , Kevin Hsi Huai Wang , Xinhua Chen , Mehmet Uzunkol
CPC classification number: H03F1/565 , H03F3/193 , H03F3/195 , H03F3/68 , H03F2200/111 , H03F2200/294 , H03F2200/451 , H03F2200/492
Abstract: An apparatus includes an inductor device including a first inductor coupled to a second inductor. The first inductor and the second inductor are connected to ground. A first transistor and a second transistor are coupled to the inductor device. A first cascode transistor is coupled to the first transistor, and a second cascode transistor is coupled to the second transistor. The first cascode transistor is coupled to a first output, and the second cascode transistor is coupled to a second output.
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公开(公告)号：US20160329976A1
公开(公告)日：2016-11-10
申请号：US14706917
申请日：2015-05-07
Applicant: QUALCOMM Incorporated
Inventor： Lai Kan Leung , Kevin Hsi Huai Wang , Dongling Pan , Chiewcharn Narathong
CPC classification number: H04B17/21 , H03F1/0205 , H03F1/0277 , H03F3/189 , H03F3/19 , H03F3/211 , H03F3/24 , H03F3/62 , H03F3/68 , H03F3/72 , H03F2200/111 , H03F2200/294 , H03F2200/451 , H03F2203/21106 , H03F2203/21142 , H03F2203/21145 , H04W24/02
Abstract: An amplifier module with an output coupler is disclosed. The amplifier module may include a plurality of input terminals and two or more output terminals. Each input terminal may be coupled to an input of an independent amplifier. Outputs from the independent amplifiers may be coupled to the two or more output terminals. The amplifier module may include an output coupler to couple the two or more output terminals together. A signal may be received by a first output terminal and be coupled by the output coupler to a second output terminal. In some embodiments, when the two or more output terminals are coupled together, the independent amplifiers may be made inactive or operated in a minimum gain configuration.
Abstract translation: 公开了具有输出耦合器的放大器模块。 放大器模块可以包括多个输入端子和两个或更多个输出端子。 每个输入端可以耦合到独立放大器的输入。 来自独立放大器的输出可以耦合到两个或更多个输出端子。 放大器模块可以包括输出耦合器以将两个或多个输出端子耦合在一起。 信号可以由第一输出端子接收并且由输出耦合器耦合到第二输出端子。 在一些实施例中，当两个或更多个输出端子耦合在一起时，独立放大器可以被制成无效或以最小增益配置运行。
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公开(公告)号：US11271328B2
公开(公告)日：2022-03-08
申请号：US16140127
申请日：2018-09-24
Applicant: Qualcomm Incorporated
Inventor： Li Liu , Kevin Hsi Huai Wang , Yunfei Feng , Chuan Wang , Gurkanwal Sahota
Abstract: An apparatus is disclosed for a hybrid wireless transceiver architecture that supports multiple antenna arrays. In an example aspect, the apparatus includes a first antenna array, a second antenna array, and a wireless transceiver. The wireless transceiver includes first dedicated circuitry dedicated to the first antenna array and second dedicated circuitry dedicated to the second antenna array. The wireless transceiver also includes shared circuitry that is shared with both the first antenna array and the second antenna array.
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公开(公告)号：US10566937B2
公开(公告)日：2020-02-18
申请号：US15583636
申请日：2017-05-01
Applicant: QUALCOMM Incorporated
Inventor： Mohammad Sadegh Mehrjoo , Chuan Wang , Yanming Xiao , Li-chung Chang , Kevin Hsi Huai Wang
Abstract: A low noise amplifier may include a post distortion cancellation block coupled to the low noise amplifier. The post distortion cancellation block may include a diode, and phase-shift logic. The phase-shift logic may be coupled in series with the diode.
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公开(公告)号：US10530314B2
公开(公告)日：2020-01-07
申请号：US15940808
申请日：2018-03-29
Applicant: Qualcomm Incorporated
Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
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