公开(公告)号：US20220059341A1

公开(公告)日：2022-02-24

申请号：US17518894

申请日：2021-11-04

申请人： Qromis, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens

IPC分类号： H01L21/02 ,  H01L33/00 ,  H01L21/84 ,  H01L27/12 ,  H01L33/02 ,  C23C16/40 ,  C23C16/50 ,  C23C16/56 ,  C30B29/06 ,  C30B29/40

摘要： An engineered substrate structure includes a ceramic substrate having a front surface characterized by a plurality of peaks. The ceramic substrate includes a polycrystalline material. The engineered substrate structure also includes a planarization layer comprising a planarization layer material and coupled to the front surface of the ceramic substrate. The planarization layer defines fill regions filled with the planarization layer material between adjacent peaks of the plurality of peaks on the front surface of the ceramic substrate. The engineered substrate structure further includes a barrier shell encapsulating the ceramic substrate and the planarization layer, wherein the barrier shell has a front side and a back side, a bonding layer coupled to the front side of the barrier shell, a single crystal layer coupled to the bonding layer, and a conductive layer coupled to the back side of the barrier shell.

公开(公告)号：US20200335418A1

公开(公告)日：2020-10-22

申请号：US16914026

申请日：2020-06-26

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens ,  Ozgur Aktas

IPC分类号： H01L23/373 ,  H01L21/02 ,  H01L23/66 ,  H01L29/20 ,  H01L29/78 ,  H01L25/16 ,  H01L33/32 ,  H01L33/64 ,  H01P1/30 ,  H01P3/00 ,  H03H9/02 ,  B81B3/00

摘要： An electronic device includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer coupled to the polycrystalline ceramic core, a conductive layer coupled to the first adhesion layer, a second adhesion layer coupled to the conductive layer, and a barrier layer coupled to the second adhesion layer. The electronic device also includes a buffer layer coupled to the support structure, a contact layer coupled to the buffer layer, and a field-effect transistor (FET) coupled to the contact layer.

公开(公告)号：US10566190B2

公开(公告)日：2020-02-18

申请号：US16161853

申请日：2018-10-16

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens

IPC分类号： H01L21/02 ,  H01L33/00 ,  C23C16/50 ,  H01L21/84 ,  H01L27/12 ,  H01L33/02 ,  C23C16/40 ,  C23C16/56 ,  C30B29/06 ,  C30B29/40

摘要： A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the ceramic substrate in a barrier layer, and forming a bonding layer coupled to the barrier layer. The method further includes removing a portion of the bonding layer to expose at least a portion of the barrier layer and define fill regions, and depositing a second bonding layer on the at least a portion of the exposed barrier layer and the fill regions.

公开(公告)号：US11328927B2

公开(公告)日：2022-05-10

申请号：US16525345

申请日：2019-07-29

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens ,  Ozgur Aktas

IPC分类号： H01L21/02 ,  C30B29/40 ,  H01L21/8252 ,  H01L21/8238 ,  H01L29/20 ,  H01L29/16 ,  H01L27/06 ,  H01L27/092 ,  H01L23/522 ,  C30B25/18 ,  C30B29/06 ,  H01L21/8258 ,  H01L21/762

摘要： A method of fabricating a semiconductor structure includes providing an engineered substrate including a polycrystalline substrate, a barrier layer encapsulating the polycrystalline substrate, and a bonding layer coupled to the barrier layer. The method further includes forming a first silicon layer coupled to the bonding layer, forming a dielectric layer coupled to the first silicon layer, forming a second silicon layer coupled to the dielectric layer, removing a portion of the second silicon layer and a corresponding portion of the dielectric layer to expose a portion of the first silicon layer, forming a gallium nitride (GaN) layer coupled to the exposed portion of the first silicon layer, forming a gallium nitride (GaN) based device coupled to the GaN layer, and forming a silicon-based device coupled to a remaining portion of the second silicon layer.

公开(公告)号：US10964535B2

公开(公告)日：2021-03-30

申请号：US16773415

申请日：2020-01-27

申请人： Qromis, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens

IPC分类号： H01L21/02 ,  C30B29/40 ,  C30B29/06 ,  C23C16/56 ,  C23C16/50 ,  C23C16/40 ,  H01L33/02 ,  H01L27/12 ,  H01L21/84 ,  H01L33/00

摘要： A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the ceramic substrate in a barrier layer, and forming a bonding layer coupled to the barrier layer. The method further includes removing a portion of the bonding layer to expose at least a portion of the barrier layer and define fill regions, and depositing a second bonding layer on the at least a portion of the exposed barrier layer and the fill regions.

公开(公告)号：US10734303B2

公开(公告)日：2020-08-04

申请号：US16179351

申请日：2018-11-02

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens ,  Ozgur Aktas

IPC分类号： H01L23/373 ,  H01L21/02 ,  H01L23/66 ,  H01L29/20 ,  H01L29/78 ,  H01L25/16 ,  H01L33/32 ,  H01L33/64 ,  H01P1/30 ,  H01P3/00 ,  H03H9/02 ,  B81B3/00 ,  H03H9/17

摘要： An electronic device includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer coupled to the polycrystalline ceramic core, a conductive layer coupled to the first adhesion layer, a second adhesion layer coupled to the conductive layer, and a barrier layer coupled to the second adhesion layer. The electronic device also includes a buffer layer coupled to the support structure, a contact layer coupled to the buffer layer, and a field-effect transistor (FET) coupled to the contact layer.

公开(公告)号：US20200234945A1

公开(公告)日：2020-07-23

申请号：US16773415

申请日：2020-01-27

申请人： Qromis, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens

IPC分类号： H01L21/02 ,  C30B29/40 ,  C30B29/06 ,  C23C16/56 ,  C23C16/50 ,  C23C16/40 ,  H01L33/02 ,  H01L27/12 ,  H01L21/84 ,  H01L33/00

摘要： A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the ceramic substrate in a barrier layer, and forming a bonding layer coupled to the barrier layer. The method further includes removing a portion of the bonding layer to expose at least a portion of the barrier layer and define fill regions, and depositing a second bonding layer on the at least a portion of the exposed barrier layer and the fill regions.

公开(公告)号：US11121120B2

公开(公告)日：2021-09-14

申请号：US16217564

申请日：2018-12-12

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens

IPC分类号： H01L23/373 ,  H01L25/065 ,  H01L23/498 ,  H01L25/00 ,  H01L21/48 ,  H01L23/538 ,  H01L23/15 ,  H01L23/00

摘要： An interposer includes a polycrystalline ceramic core disposed between a first surface and a second surface of the interposer, an adhesion layer encapsulating the polycrystalline ceramic core, a barrier layer encapsulating the adhesion layer, and one or more electrically conductive vias extending from the first surface to the second surface through the polycrystalline ceramic core, the adhesion layer, and the barrier layer.

公开(公告)号：US10910258B2

公开(公告)日：2021-02-02

申请号：US16673710

申请日：2019-11-04

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens

IPC分类号： H01L21/762 ,  H01L21/48 ,  H01L21/02 ,  H01L21/311 ,  H01L29/06 ,  B32B9/00

摘要： A substrate includes a polycrystalline ceramic core; a first adhesion layer encapsulating the polycrystalline ceramic core; a conductive layer encapsulating the first adhesion layer; a second adhesion layer encapsulating the conductive layer; a barrier layer encapsulating the second adhesion layer, and a bonding layer coupled to the barrier layer, and a substantially single crystalline silicon layer coupled to the bonding layer.

公开(公告)号：US10510582B2

公开(公告)日：2019-12-17

申请号：US15621338

申请日：2017-06-13

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens

IPC分类号： B32B9/00 ,  H01L21/762 ,  H01L29/06 ,  H01L21/48 ,  H01L21/02 ,  H01L21/311

摘要： A substrate includes a polycrystalline ceramic core; a first adhesion layer encapsulating the polycrystalline ceramic core; a conductive layer encapsulating the first adhesion layer; a second adhesion layer encapsulating the conductive layer; a barrier layer encapsulating the second adhesion layer, and a bonding layer coupled to the barrier layer, and a substantially single crystalline silicon layer coupled to the bonding layer.