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    Femur head prosthesis
    1.
    发明授权
    Femur head prosthesis 失效
    肱骨头坏死

    公开(公告)号：US5092900A

    公开(公告)日：1992-03-03

    申请号：US665338

    申请日：1991-03-06

    申请人： Pier G. Marchetti ,  Roland Willi ,  Rudolf Koch

    发明人： Pier G. Marchetti ,  Roland Willi ,  Rudolf Koch

    IPC分类号： A61F2/00 ,  A61F2/30 ,  A61F2/36

    CPC分类号： A61F2/30734 ,  A61F2/30767 ,  A61F2/367 ,  A61F2002/30433 ,  A61F2002/30774 ,  A61F2002/30975 ,  A61F2220/0041

    摘要： A femur head prosthesis is provided with a shank body for implanting in a femur and a pair of removeably fastened cheeks which are secured to opposite sides at a proximal end of the shank body. The cheeks can be selected from a kit of different sized cheeks. Also, each cheek has a bulge extending laterally from the shank body. Also, each cheek tapers in conically from lateral to medial and from proximal to distal.

    摘要翻译： 股骨头假体设置有用于植入股骨的柄体和一对可移除的紧固的脸颊，其被固定在柄体的近端处的相对侧。 脸颊可以从一套不同大小的脸颊进行选择。 此外，每个脸颊具有从柄体横向延伸的凸起。 此外，每个脸颊从外侧到内侧和从近端到远端锥形变细。

    Two-part hipjoint socket
    4.
    发明授权
    Two-part hipjoint socket 失效
    两部分hipjoint插座

    公开(公告)号：US5458649A

    公开(公告)日：1995-10-17

    申请号：US114875

    申请日：1993-08-31

    申请人： Lorenzo Spotorno ,  Rudolf Koch ,  Roland Willi

    发明人： Lorenzo Spotorno ,  Rudolf Koch ,  Roland Willi

    IPC分类号： A61F2/00 ,  A61F2/30 ,  A61F2/32 ,  A61F2/34

    CPC分类号： A61F2/34 ,  A61F2002/30322 ,  A61F2002/30324 ,  A61F2002/30332 ,  A61F2002/30345 ,  A61F2002/30405 ,  A61F2002/30408 ,  A61F2002/30477 ,  A61F2002/30604 ,  A61F2002/30827 ,  A61F2002/3085 ,  A61F2002/30858 ,  A61F2002/30876 ,  A61F2002/3241 ,  A61F2002/3411 ,  A61F2002/3443 ,  A61F2220/0025 ,  A61F2220/0033 ,  A61F2250/0026 ,  A61F2250/0036

    摘要： A hipjoint socket has an outer cup and an inner cup disposed within and secured to the outer cup. The inner cup has a hemispherical bearing surface which is concentric with an axis and terminates at the end face, which is perpendicular to the axis. An open groove formed in the end face is concentric with the axis. A closed ring has axially relatively longer and shorter portions and a cylindrical guiding surface having a diameter about equal to a diameter of the hemispherical guiding surface. The ring includes tongues engaging the groove and thereby securing the ring to the inner cup when the ring abuts the end face. The tongues are able to slide along the groove and position the cylindrical guiding surface concentric with the axis and substantially contiguous with an end of the hemispherical bearing surface at the end face. The ring can be rotated relative to the inner cup upon the implantation of the socket to position the relatively longer ring portion on the socket where it prevents luxation of a femur head cooperating with the socket.

    摘要翻译： 髋关节插座具有外杯和设置在外杯内并固定到外杯的内杯。 内杯具有与轴同心的半球形支承表面，并终止于垂直于轴线的端面。 形成在端面中的开放槽与轴线同心。 闭环具有轴向相对较长和较短的部分以及具有大约等于半球形导向表面的直径的直径的圆柱形引导表面。 环包括接合凹槽的舌片，从而当环邻接端面时将环固定到内杯。 舌片能够沿着凹槽滑动并且将圆柱形引导表面与轴线同心地定位并且在端面处与半球形支承表面的端部基本邻接。 在插入插座时，环可以相对于内杯旋转，以将相对较长的环部分定位在插座上，其中防止与插座配合的股骨头的脱离。

    Digital Amplifier with Analogue Error Correction Circuit
    7.
    发明申请
    Digital Amplifier with Analogue Error Correction Circuit 有权
    具有模拟误差校正电路的数字放大器

    公开(公告)号：US20080238543A1

    公开(公告)日：2008-10-02

    申请号：US12058596

    申请日：2008-03-28

    申请人： Rudolf Koch

    发明人： Rudolf Koch

    IPC分类号： H03G3/20 ,  H03M1/06

    CPC分类号： H03M3/354 ,  H03F3/2175 ,  H03F2200/03 ,  H03F2200/331 ,  H03F2200/453 ,  H03M3/50

    摘要： Digital amplifier for amplifying a digital input signal, comprising a digital modulator for converting the digital input signal into an amplitude-discrete and temporally analogue signal, comprising an analogue error correction circuit which modulates the pulse widths of the amplitude-discrete and temporally analogue signal in dependence on an analogue error signal, comprising a power switching stage, the input of which receives the signal modulated by the error correction circuit and which delivers the modulated signal amplified at an output and comprising an analogue feedback circuit which, in dependence on the output signal of the digital modulator and on the output signal of the power switching stage, generates the analogue error signal for adjusting the analogue error correction circuit.

    摘要翻译： 用于放大数字输入信号的数字放大器，包括用于将数字输入信号转换成幅度离散和时间模拟信号的数字调制器，包括模拟误差校正电路，其对幅度离散和时间模拟信号的脉冲宽度进行调制 依赖于模拟误差信号，包括功率切换级，其输入端接收由误差校正电路调制的信号，并传送在输出处放大的调制信号，并包括模拟反馈电路，该模拟反馈电路根据输出信号 的数字调制器和功率开关级的输出信号，产生用于调整模拟误差校正电路的模拟误差信号。

    Circuit arrangement and method for reducing an alignment error in a sigma-delta modulator
    8.
    发明申请
    Circuit arrangement and method for reducing an alignment error in a sigma-delta modulator 有权
    用于减小Σ-Δ调制器中的对准误差的电路布置和方法

    公开(公告)号：US20050007472A1

    公开(公告)日：2005-01-13

    申请号：US10869704

    申请日：2004-06-16

    申请人： Rudolf Koch

    发明人： Rudolf Koch

    IPC分类号： H03M3/00 ,  H03M3/02 ,  H04N5/335

    CPC分类号： H03M3/348 ,  H03M3/372 ,  H03M3/43

    摘要： The invention proposes includes a circuit that operates continuously in the time domain on the basis of the sigma-delta principle. The circuit includes at least one integrating circuit that is characterized by a first transfer function, and has a comparison circuit having a clock signal applied thereto that compares an output signal coming from the at least one integrating circuit with a reference signal and delivers a binary output signal. The circuit further includes an apparatus for signal feedback that is connected to the output of the comparison circuit and to the input of the at least one integrating circuit, and is characterized by a second transfer function. Further, an alignment device is provided that aligns the second transfer function of the apparatus for signal feedback with the first transfer function of the integrating circuit.

    摘要翻译： 本发明提出了一种基于Σ-Δ原理在时域中连续工作的电路。 该电路包括至少一个积分电路，其特征在于第一传递函数，并且具有施加有时钟信号的比较电路，其将来自至少一个积分电路的输出信号与参考信号进行比较，并传送二进制输出 信号。 该电路还包括一个连接到比较电路的输出和至少一个积分电路的输入的信号反馈装置，其特征在于第二传递函数。 此外，提供了一种对准装置，其将用于信号反馈的装置的第二传递函数与积分电路的第一传递函数对准。

    Current mirror
    9.
    发明授权
    Current mirror 失效
    电流镜

    公开(公告)号：US5598094A

    公开(公告)日：1997-01-28

    申请号：US301867

    申请日：1994-09-06

    申请人： Oliver Kiehl ,  Rudolf Koch

    发明人： Oliver Kiehl ,  Rudolf Koch

    IPC分类号： G05F3/26 ,  G05F3/20

    CPC分类号： G05F3/26

    摘要： A current mirror includes first through eighteenth transistors. The load paths of the first and second transistors are in series for carrying an input current to a first supply potential. The control terminals of the first through eighth transistors receive the input current. The load paths of the fourth, third, ninth and tenth transistors are in series between the first and a second supply potential. The third and ninth transistors form a tap being connected to the control terminals of the ninth, tenth, eleventh, twelfth and thirteenth transistors. The load paths of the fifth, sixth, eleventh and fourteenth transistors are in series between the first and second supply potentials. The sixth and eleventh transistors form a tap being connected to the control terminals of the fourteenth through sixteenth transistors. The load paths of the seventeenth, seventh, twelfth and fifteenth transistors are in series between the first and second supply potentials. The seventh and twelfth transistors form a tap being connected to the control terminals of the seventeenth and eighteenth transistors. The load paths of the eighteenth and eighth transistors are in series for tapping a first output current proportional to the input current from the first supply potential. The load paths of the sixteenth and thirteenth transistors are in series for tapping a second output current equal to the first from the second supply potential. The ninth through sixteenth transistors are of one, and the seventeenth, eighteenth and first through eighth transistors being of the other, conduction type.

    摘要翻译： 电流镜包括第一至第十八晶体管。 第一和第二晶体管的负载路径是串联的，用于将输入电流传送到第一电源电位。 第一至第八晶体管的控制端接收输入电流。 第四，第三，第九和第十晶体管的负载路径串联在第一和第二供电电位之间。 第三和第九晶体管形成连接到第九，十，十一，十二和十三个晶体管的控制端的抽头。 第五，第六，第十一和第十四晶体管的负载路径串联在第一和第二电源电位之间。 第六和第十六晶体管形成连接到第十四至第十六晶体管的控制端的抽头。 第十七，第十二，第十五和第十五晶体管的负载路径串联在第一和第二供电电位之间。 第七和第十二晶体管形成连接到第十七和第十八晶体管的控制端的抽头。 第十八和第八晶体管的负载路径是串联的，用于分流与来自第一电源电位的输入电流成比例的第一输出电流。 第十六和第十三晶体管的负载路径是串联的，用于从第二电源电位抽出等于第一输出电流的第二输出电流。 第九至第十六晶体管是一个，并且第十七，十八和第一至第八晶体管是另一个导电类型。

    Process and device for the continuous treatment of silicon
    10.
    发明授权
    Process and device for the continuous treatment of silicon 失效
    用于连续处理硅的工艺和器件

    公开(公告)号：US5490162A

    公开(公告)日：1996-02-06

    申请号：US170330

    申请日：1994-01-03

    申请人： Anton More ,  Karl Hutzler ,  Rudolf Koch

    发明人： Anton More ,  Karl Hutzler ,  Rudolf Koch

    IPC分类号： C01B33/037 ,  F27D3/14 ,  C03B3/00

    CPC分类号： F27D3/14 ,  C01B33/037

    摘要： The invention relates to a process for the continuous treatment of silicon in which a slag in a pivotable low-shaft furnace (1) with a discharge pipe (4) reaching the bottom of the furnace tank is taken to a temperature of 1450.degree. to 1800.degree. C. and this slag is used to melt solid silicon and/or liquid silicon is continuously refined and the liquid refined silicon is then sprayed with compressed air or nitrogen (7) and continuously conveyed into a transport crucible (11) by being poured into a stream of water (9) in the channel (8) via a dewatering filter (10) and thus obtained in granular form. The invention also relates to devices for implementing the process.

    摘要翻译： PCT No.PCT / DE92 / 00526 Sec。 371日期1994年1月3日 102（e）日期1994年1月3日PCT提交1992年6月26日PCT公布。 公开号WO93 / 01131 日本1993年1月21日。本发明涉及一种连续处理硅的方法，其中在具有排放管（4）到达炉罐底部的可转动低轴炉（1）中的炉渣被取到 温度为1450℃至1800℃，并且该熔渣用于熔融固体硅和/或液体硅，并且随后用压缩空气或氮气（7）喷射液态精细硅，并将其连续输送到输送坩埚中 （11）通过经由脱水过滤器（10）在通道（8）中倒入水（9）中，从而获得颗粒状。 本发明还涉及用于实现该过程的装置。