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公开(公告)号：US20080104156A1
公开(公告)日：2008-05-01
申请号：US11851697
申请日：2007-09-07
申请人： Rob Macaulay , Morgan Colmer
发明人： Rob Macaulay , Morgan Colmer
IPC分类号： G06F7/58
摘要： A random number generator comprising a sigma-delta modulator, the sigma-delta modulator having a modulation unit and a feedback loop arranged to receive a digital output signal from the modulator and form an adjustment signal in dependence on the digital output signal such that at any given time the absolute difference between an amplitude of a summation output signal of the modulator and a quantizer threshold of the modulator is less than the first voltage range. The random number generator is thus capable of forming a digital output signal that has a high degree of entropy.
摘要翻译： 一种随机数发生器，包括Σ-Δ调制器，具有调制单元的Σ-Δ调制器和布置成从调制器接收数字输出信号并根据数字输出信号形成调整信号的反馈环路， 给定时间时，调制器的求和输出信号的幅度与调制器的量化器阈值之间的绝对差小于第一电压范围。 因此，随机数发生器能够形成具有高度熵的数字输出信号。
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公开(公告)号：US20060017595A1
公开(公告)日：2006-01-26
申请号：US10502728
申请日：2002-12-23
IPC分类号： H03M3/00
摘要： The A/D converter has a digital output for outputting a digital output signal selected from a set of three or more available values. A feedback loop generates the digital output signal so that a time averaged difference between an analog input signal and an analog feedback signal representative of the digital output signal is minimized. A feedback signal generator generates successive signal levels of the feedback signal. A return to zero switch inserts predetermined return to zero levels between the signal levels in the feedback signal. The return to zero switch is also used to provide the signal level for one of the available values.
摘要翻译： A / D转换器具有用于输出从一组三个或更多个可用值中选择的数字输出信号的数字输出。 反馈回路产生数字输出信号，使得模拟输入信号和表示数字输出信号的模拟反馈信号之间的时间平均差最小化。 反馈信号发生器产生反馈信号的连续信号电平。 返回到零开关将反馈信号中的信号电平之间的预定值恢复为零电平。 返回零开关也用于为可用值之一提供信号电平。
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公开(公告)号：US5610606A
公开(公告)日：1997-03-11
申请号：US277265
申请日：1994-07-21
申请人： Toshitaka Fukunaga , Mitsuru Nagata
发明人： Toshitaka Fukunaga , Mitsuru Nagata
摘要： A 1-bit D/A conversion circuit according to the present invention comprises an RZ signal generating circuit and a PRZ signal generating circuit. The RZ signal generating circuit receives 1-bit digital data sampled at a predetermined frequency, converts the digital data into a first RZ signal and a second RZ signal complementary to the first RZ signal, shifts the first and second RZ signals with respect to each other by an integral multiple of the predetermined frequency, which is greater than one, and outputs these RZ signals. The PRZ signal generating circuit receives the first and second RZ signals, combines these signals together, and outputs a signal which is a type of a PRZ signal.
摘要翻译： 根据本发明的1位D / A转换电路包括RZ信号发生电路和PRZ信号发生电路。 RZ信号发生电路接收以预定频率采样的1位数字数据，将数字数据转换成与第一RZ信号互补的第一RZ信号和第二RZ信号，使第一和第二RZ信号相对于彼此移位 以大于1的预定频率的整数倍，并输出这些RZ信号。 PRZ信号发生电路接收第一和第二RZ信号，将这些信号组合在一起，并输出作为PRZ信号类型的信号。
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公开(公告)号：US4972436A
公开(公告)日：1990-11-20
申请号：US257733
申请日：1988-10-14
申请人： Raouf Y. Halim , Randy D. Nash
发明人： Raouf Y. Halim , Randy D. Nash
IPC分类号： H03M3/02
摘要： An improved analog front end circuit for a high performance modem comprising an oversampling sigma delta modulator analog-to-digital converter which employs a novel four phase clocked MOSFET switched capacitor integrator. The integrator is switched in a manner as to eliminate signal dependent charges in the MOSFET switches. The sigma delta modulator shifts quantization noise of the analog-to-digital conversion process out of baseband of the analog signal. A novel integrated decimating FIR low pass filter filters the quantization noise from the digital output signals, and reduces the number of digital signals to obtain a sufficient number of signal samples in order to provide operation at high speeds, for example 9600 bps. The improved four phase switched capacitor integrator is also suitable for use in sigma delta modulator circuits, analog-to-digital converter circuits, integrating cirucits, and the like. A novel return-to-zero circuit eliminates distortion in a sigma delta modulator based analog-to-digital conversion process which can result from unequal rise and fall times of the digital output, by insuring that the energies in signals represented by a "one" and signals represented by a "zero" are equal, even during portions of the bit stream wherein there is a consecutive sequence of "ones".
摘要翻译： 用于高性能调制解调器的改进的模拟前端电路包括采用新型四相时钟MOSFET开关电容器积分器的过采样Σ-Δ调制器模数转换器。 积分器的切换方式是消除MOSFET开关中的信号相关电荷。 Σ-Δ调制器将模拟 - 数字转换处理的量化噪声移出模拟信号的基带。 一种新颖的集成抽取FIR低通滤波器从数字输出信号中滤除量化噪声，并且减少数字信号的数量以获得足够数量的信号样本，以提供高速操作，例如9600bps。 改进的四相开关电容器积分器也适用于Σ-Δ调制器电路，模数转换器电路，集成电路等。 一种新颖的归零电路消除了由于数字输出的不等上升和下降时间引起的基于Σ-Δ调制器的模数转换过程中的失真，通过确保由“一”表示的信号中的能量， 并且即使在存在连续序列“1”的比特流的部分期间，由“零”表示的信号也相等。
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公开(公告)号：US20190245550A1
公开(公告)日：2019-08-08
申请号：US16220870
申请日：2018-12-14
申请人： Analog Devices, Inc.
CPC分类号： H03M1/0641 , H03M3/348 , H03M3/358 , H03M13/6343
摘要： Analog circuits are often non-linear, and the non-linearities can hurt performance. Designers would trade off power consumption to achieve better linearity. An efficient and effective calibration technique can address the non-linearities and reduce the overall power consumption. A dither signal injected to the analog circuit can be used to expose the non-linear behavior in the digital domain. To detect the non-linearities, a counting approach is applied to isolate non-linearities independent of the input distribution. The approach is superior to and different from other approaches in many ways.
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公开(公告)号：US07034727B2
公开(公告)日：2006-04-25
申请号：US10867688
申请日：2004-06-16
申请人： Yong-Ping Xu
发明人： Yong-Ping Xu
摘要： A bandpass sigma-delta modulator using acoustic resonators or micro-mechanical resonators. In order to improve resolution at high frequencies, acoustic resonators or micro-mechanical resonators are utilized in a sigma-delta modulator instead of electronic resonators. The quantized output is fed back using a pair of D/A converters to an input summation device. In fourth order devices, the feed back is to two summation devices in series. Such a sigma-delta modulator is usable in a software defined radio cellular telephone system and in other applications where high-frequency and high-resolution A/D conversion is required.
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公开(公告)号：US06897799B1
公开(公告)日：2005-05-24
申请号：US10897240
申请日：2004-07-22
摘要： A digital-to-analog converter having a differential signal path, and a current parking circuit that is independent of the signal path, thereby avoiding a source of imbalance that caused output anomalies in conventional digital-to-analog circuitry. In one embodiment of the invention, a pair of diodes in the current parking circuit are connected through their own independent load resistors to a voltage source. In another embodiment, a single diode is used instead of the pair of diodes, and in a third embodiment the current parking circuit comprises a single load resistor connected to the voltage source, and no diodes at all.
摘要翻译： 具有差分信号路径的数模转换器和独立于信号路径的当前停车电路，从而避免在常规数模转换电路中引起输出异常的不平衡源。 在本发明的一个实施例中，当前停车电路中的一对二极管通过它们自己的独立负载电阻器连接到电压源。 在另一个实施例中，使用单个二极管代替一对二极管，并且在第三实施例中，当前的停车电路包括连接到电压源的单个负载电阻器，并且根本不存在二极管。
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公开(公告)号：US20040239541A1
公开(公告)日：2004-12-02
申请号：US10867688
申请日：2004-06-16
发明人： Yong-Ping Xu
IPC分类号： H03M003/00
摘要： A bandpass sigma-delta modulator using acoustic resonators or micro-mechanical resonators. In order to improve resolution at high frequencies, acoustic resonators or micro-mechanical resonators are utilized in a sigma-delta modulator instead of electronic resonators. The quantized output is fed back using a pair of D/A converters to an input summation device. In fourth order devices, the feed back is to two summation devices in series. Such a sigma-delta modulator is usable in a software defined radio cellular telephone system and in other applications where high-frequency and high-resolution A/D conversion is required.
摘要翻译： 使用声谐振器或微机械谐振器的带通Σ-Δ调制器。 为了提高高频分辨率，在Σ-Δ调制器中代替电子谐振器使用声谐振器或微机械谐振器。 量化输出使用一对D / A转换器反馈到输入求和装置。 在四阶装置中，反馈是串联的两个求和装置。 这种Σ-Δ调制器可用于软件定义的无线电蜂窝电话系统以及需要高频和高分辨率A / D转换的其它应用中。
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公开(公告)号：US20030090399A1
公开(公告)日：2003-05-15
申请号：US10188071
申请日：2002-07-03
发明人： Yong-Ping Xu
IPC分类号： H03M003/00
摘要： A bandpass sigma-delta modulator using acoustic resonators or micro-mechanical resonators. In order to improve resolution at high frequencies, acoustic resonators or micro-mechanical resonators are utilized in a sigma-delta modulator instead of electronic resonators. The quantized output is fed back using a pair of D/A converters to an input summation device. In fourth order devices, the feed back is to two summation devices in series. Such a sigma-delta modulator is usable in a software defined radio cellular telephone system and in other applications where high-frequency and high-resolution A/D conversion is required.
摘要翻译： 使用声谐振器或微机械谐振器的带通Σ-Δ调制器。 为了提高高频分辨率，在Σ-Δ调制器中代替电子谐振器使用声谐振器或微机械谐振器。 量化输出使用一对D / A转换器反馈到输入求和装置。 在四阶装置中，反馈是串联的两个求和装置。 这种Σ-Δ调制器可用于软件定义的无线电蜂窝电话系统以及需要高频和高分辨率A / D转换的其它应用中。
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10.发明授权
公开(公告)号：US5528239A
公开(公告)日：1996-06-18
申请号：US870599
申请日：1992-04-17
摘要： The output gates of a delta-sigma modulator can generate i(t) transient signal in the power supply lines of a delta-sigma modulator. These i(t) spikes, which would otherwise produce non-linearities which can be coupled into the frequency band of interest of the modulator, are made to be linear by using return-to-zero data encoding and by providing multi-bit outputs to the delta-sigma modulator in which the output states all have equal numbers of logic ones at the output lines for each of the output states.
摘要翻译： Δ-Σ调制器的输出门可以在Δ-Σ调制器的电源线中产生i（t）瞬态信号。 否则将产生可以耦合到调制器感兴趣的频带中的非线性的这些i（t）尖峰通过使用返回到零数据编码而被做成线性的，并且通过提供多位输出 其中输出状态对于每个输出状态在输出线处具有相等数量的逻辑1的Δ-Σ调制器。
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