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公开(公告)号:US20190163363A1
公开(公告)日:2019-05-30
申请号:US15867719
申请日:2018-01-11
Applicant: PHISON ELECTRONICS CORP.
Inventor: Wei Lin , An-Cheng Liu , Lih Yuarn Ou , Szu-Wei Chen
CPC classification number: G06F3/061 , G06F3/0619 , G06F3/0658 , G06F3/0659 , G06F3/0679 , G06F11/1068 , G06F11/1072 , G11C16/0483 , G11C16/26 , G11C29/028 , G11C29/52 , G11C2029/0407
Abstract: A data accessing method, a memory controlling circuit unit and a memory storage device are provided. The method includes: reading a first physical programming unit by using a first read voltage to obtain first data; reading the first physical programming unit by using a second read voltage to obtain second data; inputting a first state parameter corresponding to the first data and a second state parameter corresponding to the second data into a numerical calculation engine, and determining a third reading voltage for reading the first physical programming unit by the numerical calculation engine.
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公开(公告)号:US20200035306A1
公开(公告)日:2020-01-30
申请号:US16120313
申请日:2018-09-03
Applicant: PHISON ELECTRONICS CORP.
Inventor: Wei Lin , Yu-Cheng Hsu , Tsai-Hao Kuo , Szu-Wei Chen , Lih Yuarn Ou , Hsiao-Yi Lin
Abstract: A voltage adjusting method, a memory controlling circuit unit and a memory storage device are provided. The method includes: reading a first physical programming unit in a first physical programming unit group to obtain first data; correcting the first data according to a first error check and correction code corresponding to the first data to obtain first corrected data; reading a second physical programming unit in the first physical programming unit group to obtain second data; and adjusting a first read voltage for reading a first memory cell to a second read voltage according to the first data, the first corrected data, and the second data.
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公开(公告)号:US10679707B2
公开(公告)日:2020-06-09
申请号:US16120313
申请日:2018-09-03
Applicant: PHISON ELECTRONICS CORP.
Inventor: Wei Lin , Yu-Cheng Hsu , Tsai-Hao Kuo , Szu-Wei Chen , Lih Yuarn Ou , Hsiao-Yi Lin
Abstract: A voltage adjusting method, a memory controlling circuit unit and a memory storage device are provided. The method includes: reading a first physical programming unit in a first physical programming unit group to obtain first data; correcting the first data according to a first error check and correction code corresponding to the first data to obtain first corrected data; reading a second physical programming unit in the first physical programming unit group to obtain second data; and adjusting a first read voltage for reading a first memory cell to a second read voltage according to the first data, the first corrected data, and the second data.
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公开(公告)号:US11373713B1
公开(公告)日:2022-06-28
申请号:US17209214
申请日:2021-03-22
Applicant: PHISON ELECTRONICS CORP.
Inventor: Shih-Jia Zeng , Lih Yuarn Ou , Hsiao-Yi Lin , Wei Lin
Abstract: A memory control method, a memory storage device, and a memory control circuit unit are provided. The memory control method includes: reading multiple first memory cells using multiple read voltage levels to obtain a first threshold voltage distribution of the first memory cells; obtaining shift information of the first threshold voltage distribution with respect to an original threshold voltage distribution of the first memory cells; obtaining first reliability information corresponding to the first threshold voltage distribution; recovering original reliability information corresponding to the original threshold voltage distribution according to a statistical characteristic of the first reliability information; adjusting the original reliability information according to the shift information to obtain second reliability information corresponding to the first threshold voltage distribution; and updating reliability information related to the first memory cells according to the second reliability information.
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公开(公告)号:US10685711B1
公开(公告)日:2020-06-16
申请号:US16276634
申请日:2019-02-15
Applicant: PHISON ELECTRONICS CORP.
Inventor: Wei Lin , Lih Yuarn Ou , Yu-Siang Yang
Abstract: A decoding method, a memory controlling circuit unit, and a memory storage device are provided. The method includes: receiving a read command for reading first data; obtaining a current first temperature of a rewritable non-volatile memory module according to the read command; obtaining a second temperature of the rewritable non-volatile memory module of writing the first data to a first physical programming unit according to the read command; and selecting a first decoding operation according to the first temperature and the second temperature and executing the first decoding operation.
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公开(公告)号:US10445002B2
公开(公告)日:2019-10-15
申请号:US15867719
申请日:2018-01-11
Applicant: PHISON ELECTRONICS CORP.
Inventor: Wei Lin , An-Cheng Liu , Lih Yuarn Ou , Szu-Wei Chen
Abstract: A data accessing method, a memory controlling circuit unit and a memory storage device are provided. The method includes: reading a first physical programming unit by using a first read voltage to obtain first data; reading the first physical programming unit by using a second read voltage to obtain second data; inputting a first state parameter corresponding to the first data and a second state parameter corresponding to the second data into a numerical calculation engine, and determining a third reading voltage for reading the first physical programming unit by the numerical calculation engine.
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