公开(公告)号：US10340347B1

公开(公告)日：2019-07-02

申请号：US16146272

申请日：2018-09-28

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Kazuma Yoshida ,  Takeshi Imamura ,  Toshikazu Imai ,  Ryosuke Okawa ,  Ryou Kato

IPC: H01L29/417 ,  H01L23/00 ,  H01L27/088 ,  H01L29/423 ,  H01L29/78

CPC classification number: H01L29/41775 ,  H01L23/562 ,  H01L27/088 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/7827

Abstract: A semiconductor device includes a first gate electrode, a plurality of first source electrodes, a second gate electrode, and a plurality of second source electrodes. The first gate electrode is arranged with no other electrode between the first gate electrode and a first short side of the semiconductor substrate. The plurality of first source electrodes include a plurality of approximately rectangular first source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate. The second gate electrode is arranged with no other electrode between the second gate electrode and a second short side of the semiconductor substrate. The plurality of second source electrodes include a plurality of approximately rectangular second source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate.

公开(公告)号：US10930748B2

公开(公告)日：2021-02-23

申请号：US16488224

申请日：2019-01-17

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Masao Hamasaki ,  Masaaki Hirako ,  Ryosuke Okawa ,  Ryou Kato

IPC: H01L29/417 ,  H01L23/00 ,  H01L29/78 ,  H01L29/10 ,  H01L29/45 ,  H01L27/088

Abstract: A semiconductor device includes: a semiconductor (10 μm≤tsi≤30 μm); a metal layer (30 μm≤tag≤60 μm) comprising Ag; a metal layer (10 μm≤tni≤35 μm) comprising Ni; and transistors. The transistors include a source electrode and a gate electrode on the semiconductor layer. The metal layer functions as a common drain region for the transistors. The ratio of the lengths of the longer side and the shorter side of the semiconductor layer is at most 1.73. The ratio of the surface area and the perimeter length of each electrode included in the source electrode is at most 0.127. The cumulative surface area of the source electrode and the gate electrode is at most 2.61 mm2. The length of the shorter side of the source electrode is at most 0.3 mm, and 702

公开(公告)号：US10854744B2

公开(公告)日：2020-12-01

申请号：US16447100

申请日：2019-06-20

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yoshihiro Matsushima ,  Shigetoshi Sota ,  Eiji Yasuda ,  Toshikazu Imai ,  Ryosuke Okawa ,  Kazuma Yoshida ,  Ryou Kato

IPC: H01L23/15 ,  H01L29/78 ,  H01L27/088

Abstract: A semiconductor device includes an N-type semiconductor substrate comprising silicon, an N-type low-concentration impurity layer that is in contact with the upper surface of the N-type semiconductor substrate, a metal layer that is in contact with the entire lower surface of the N-type semiconductor substrate and has a thickness of at least 20 μm, and first and second vertical MOS transistors formed in the low-concentration impurity layer. The ratio of the thickness of the metal layer to the thickness of a semiconductor layer containing the N-type semiconductor substrate and the low-concentration impurity layer is greater than 0.27. The semiconductor device further includes a support comprising a ceramic material and bonded to the entire lower surface of the metal layer only via a bonding layer.

公开(公告)号：US10541310B2

公开(公告)日：2020-01-21

申请号：US16418617

申请日：2019-05-21

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Kazuma Yoshida ,  Takeshi Imamura ,  Toshikazu Imai ,  Ryosuke Okawa ,  Ryou Kato

IPC: H01L29/417 ,  H01L29/78 ,  H01L27/088 ,  H01L23/00 ,  H01L29/423

Abstract: A semiconductor device includes a first gate electrode, a plurality of first source electrodes, a second gate electrode, and a plurality of second source electrodes. The first gate electrode is arranged with no other electrode between the first gate electrode and a first short side of the semiconductor substrate. The plurality of first source electrodes include a plurality of approximately rectangular first source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate. The second gate electrode is arranged with no other electrode between the second gate electrode and a second short side of the semiconductor substrate. The plurality of second source electrodes include a plurality of approximately rectangular second source electrodes arranged in stripes extending parallel to the lengthwise direction of the semiconductor substrate.