ANTENNA PACKAGE
    2.
    发明公开
    ANTENNA PACKAGE 审中-公开

    公开(公告)号:US20240347928A1

    公开(公告)日:2024-10-17

    申请号:US18600833

    申请日:2024-03-11

    Applicant: NXP B.V.

    CPC classification number: H01Q21/065 H01Q9/0414 H01Q21/0087

    Abstract: An antenna package and method of manufacturing an antenna package is disclosed. The antenna package includes a first substrate and second substrate in a stacked arrangement. A first plurality of patch antennas and a plurality of decoupling capacitors is arranged on a first major surface of the first substrate. One or more decoupling capacitor of the plurality of decoupling capacitors is located between adjacent patch antennas of the first plurality of patch antennas. The second substrate includes a second plurality of patch antennas. One or more decoupling capacitors of the plurality of decoupling capacitors includes a first terminal configured to be in contact with the first substrate and a second terminal configured to be in contact with the first substrate and the second substrate.

    Power combiner/splitter for millimetre wave applications

    公开(公告)号:US12009565B2

    公开(公告)日:2024-06-11

    申请号:US17314219

    申请日:2021-05-07

    Applicant: NXP B.V.

    Abstract: A power combiner/splitter for multiple input multiple output (MIMO) applications and a method of making the same. A metallisation stack has a plurality of layers including patterned metal features forming first and second branched arrangements of the power combiner/splitter. Each branched arrangement includes a port located at one end of that branched arrangement, and a plurality of further ports. Each branched arrangement also includes a plurality of bifurcated branches extending between each end of that branched arrangement for dividing/combining a signal passing through that branched arrangement between the port and the plurality of further ports. The metallisation stack further includes a common ground plane that is shared by the first and second branched arrangements. At least some of the patterned metal features forming the first branched arrangement overlie at least some of the patterned metal features forming the second branched arrangement.

    PHASED-ARRAY ANTENNA SYSTEM
    4.
    发明公开

    公开(公告)号:US20230268667A1

    公开(公告)日:2023-08-24

    申请号:US18161315

    申请日:2023-01-30

    Applicant: NXP B.V.

    CPC classification number: H01Q21/065 H01Q3/247 H01Q21/08

    Abstract: A phased-array antenna system includes a substrate and a plurality of sub-arrays. Each sub-array comprises an array of patch antennas arranged on a first major surface of the substrate; a plurality of beamformer devices coupled to the array of patch antennas; a multi-channel up-down converter (UDC) and a combiner-splitter coupled to the multi-channel UDC. The combiner-splitter is configured to split a signal provided by the UDC and provide the signal to each of the plurality of beamformers and/or to combine signal provided by the plurality of beamformers and to provide the combined signal to the UDC. Each sub-array also includes an integrated device comprising the multi-channel UDC and the combiner-splitter. The integrated device and the plurality of beamformer devices is arranged on a second major surface of the substrate opposite the first major surface. The integrated device is arranged between at least two beamformer devices.

    MIMO ANTENNA SYSTEM AND METHOD
    5.
    发明公开

    公开(公告)号:US20230170945A1

    公开(公告)日:2023-06-01

    申请号:US18052965

    申请日:2022-11-07

    Applicant: NXP B.V.

    CPC classification number: H04B7/0413 H04B7/10 H01Q21/24

    Abstract: A multiple-input multiple-output (MIMO) antenna system for a mobile cellular network and method is described. The MIMO antenna system includes an array of dual-polarization patch antennas each having first and second polarization feed-points. A signal is transmitted via the first polarization feed-point of a dual-polarisation patch antennas and a replica of the transmitted signal is sensed (detected) using the second polarization feed-point of the same patch antenna. This replica signal is used by a digital predistortion module to apply predistortion to a subsequently transmitted signal.

    Power stage
    7.
    发明授权
    Power stage 有权
    动力舞台

    公开(公告)号:US08963586B2

    公开(公告)日:2015-02-24

    申请号:US14172256

    申请日:2014-02-04

    Applicant: NXP B.V.

    CPC classification number: H03K19/018521 H03K19/00315 H03K19/018528

    Abstract: A power stage has a differential output stage 2 driven by one or more buffer stages 4. The buffer stages 4 are implemented as high and low side buffers 12,14, each of which is itself a differential buffer implemented using transistors formed in an isolated-well technology such as triple-well CMOS.

    Abstract translation: 功率级具有由一个或多个缓冲级4驱动的差分输出级2.缓冲级4被实现为高侧缓冲器12和低侧缓冲器12,14,每个缓冲器本身都是使用形成在隔离级中的晶体管实现的差分缓冲器, 良好的技术,如三阱CMOS。

    RF component and method
    8.
    发明授权

    公开(公告)号:US12114472B2

    公开(公告)日:2024-10-08

    申请号:US18059611

    申请日:2022-11-29

    Applicant: NXP B.V.

    CPC classification number: H05K9/0081 H01P3/08 H01Q1/526 H05K9/0037

    Abstract: A Radio Frequency, “RF”, component and a method of making the same. The component includes a first electrically conductive signal member for conveying an RF signal and a second electrically conductive signal member for conveying an RF signal. The component also includes a barrier located between the first signal member and the second signal member electromagnetically to shield the first and second signal members from each other. The barrier includes a first row of electrically conductive shielding members spaced apart along a longitudinal axis of the first row, and a second row of electrically conductive shielding members spaced apart along a longitudinal axis of the second row. Each shielding member includes a polyhedron. The shielding members of the first row are offset with respect to the shielding members of the second row to prevent a direct line of sight between the first signal member and the second signal member.

    A CIRCUIT
    9.
    发明公开
    A CIRCUIT 审中-公开

    公开(公告)号:US20240098906A1

    公开(公告)日:2024-03-21

    申请号:US18459759

    申请日:2023-09-01

    Applicant: NXP B.V.

    CPC classification number: H05K3/3405 H05K1/0233 H05K1/025 H05K2201/10053

    Abstract: A circuit comprising: a digital attenuator part comprising: a first and second attenuator terminal; a first inductor having a first terminal coupled to the first attenuator terminal and a second terminal coupled to the second attenuator terminal; a first switched arrangement comprising a first switch having a first switch-terminal and a second switch-terminal, wherein the first switch-terminal is coupled to the first terminal of the first inductor, and a first resistor and a first capacitor are arranged in parallel, coupled between the second switch-terminal and a reference voltage; and a second switched arrangement comprising a second switch having a first switch-terminal and a second switch-terminal, wherein the first switch-terminal is coupled to the second terminal of the first inductor, and wherein a second resistor and a second capacitor are arranged in parallel and coupled between the second switch-terminal and the reference voltage.

    BEAMFORMER AND METHOD OF OPERATION OF A BEAMFORMER FOR MIMO ANTENNA SYSTEM

    公开(公告)号:US20230387985A1

    公开(公告)日:2023-11-30

    申请号:US18306391

    申请日:2023-04-25

    Applicant: NXP B.V.

    CPC classification number: H04B7/0617 H04B7/0426

    Abstract: A beamformer device for a multiple-input, multiple-output (MIMO) antenna system and method of operating a beamformer device is described. the beamformer device includes a number of beamformer channels. Each beamformer channel includes a RF terminal, an antenna connection terminal; and a power detector having a power detector output, The beamformer device includes a digital control interface comprising a serial data input and a serial data output; a control input coupled to the serial data input; and a beamformer monitor output configured to be selectively coupled to either the serial data output or the power detector output of one of the beamformer channels.

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