公开(公告)号：US10158002B2

公开(公告)日：2018-12-18

申请号：US15678021

申请日：2017-08-15

Applicant: NXP B.V.

Inventor： Mahmoud Al-sa'di ,  Petrus Magnee ,  Johannes Donkers ,  Ihor Brunets ,  Joost Melai

IPC: H01L29/66 ,  H01L21/265 ,  H01L29/78

Abstract: A method of making a semiconductor switch device and a semiconductor switch device made according to the method. The method includes depositing a gate dielectric on a major surface of a substrate. The method also includes depositing and patterning a gate electrode on the gate dielectric. The method further includes depositing an oxide to cover the top surface and sidewall(s) of the gate electrode. The method also includes, after depositing the oxide, performing a first ion implantation process at a first implantation dosage for forming a lightly doped drain region of the switch device. The method further includes forming sidewall spacers on the sidewall(s) of the gate electrode. The method also includes performing a second ion implantation process at a second implantation dosage for forming a source region and a drain region of the semiconductor switch device. The second implantation dosage is greater than the first implantation dosage.

公开(公告)号：US09905679B2

公开(公告)日：2018-02-27

申请号：US14988441

申请日：2016-01-05

Applicant: NXP B.V.

Inventor： Petrus Hubertus Cornelis Magnee ,  Joost Melai ,  Viet Thanh Dinh ,  Tony Vanhoucke

IPC: H01L29/732 ,  H01L29/737 ,  H01L29/423 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40 ,  H01L29/66 ,  H03F3/21

CPC classification number: H01L29/7378 ,  H01L29/063 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/423 ,  H01L29/66242 ,  H01L29/732 ,  H01L29/7371 ,  H03F3/21

Abstract: A semiconductor device comprising a bipolar transistor and a method of making the same. The bipolar transistor includes a collector having a laterally extending drift region. The bipolar transistor also includes a base located above the collector. The bipolar transistor further includes an emitter located above the base. The bipolar transistor also includes a reduced surface field (RESURF) gate located above an upper surface of the laterally extending drift region for shaping an electric field within the collector. The bipolar transistor further includes a gap located between the reduced surface field gate and an extrinsic region of the base of the device, for electrically isolating the reduced surface field gate from the base. A lateral dimension Lgap of the gap is in the range 0.1 μm≦Lgap≦1.0 μm.

公开(公告)号：US20180053833A1

公开(公告)日：2018-02-22

申请号：US15678021

申请日：2017-08-15

Applicant: NXP B.V.

Inventor： Mahmoud Al-sa'di ,  Petrus Magnee ,  Johannes Donkers ,  Ihor Brunets ,  Joost Melai

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/265

CPC classification number: H01L29/6659 ,  H01L21/265 ,  H01L29/6656 ,  H01L29/7833

Abstract: A method of making a semiconductor switch device and a semiconductor switch device made according to the method. The method includes depositing a gate dielectric on a major surface of a substrate. The method also includes depositing and patterning a gate electrode on the gate dielectric. The method further includes depositing an oxide to cover the top surface and sidewall(s) of the gate electrode. The method also includes, after depositing the oxide, performing a first ion implantation process at a first implantation dosage for forming a lightly doped drain region of the switch device. The method further includes forming sidewall spacers on the sidewall(s) of the gate electrode. The method also includes performing a second ion implantation process at a second implantation dosage for forming a source region and a drain region of the semiconductor switch device. The second implantation dosage is greater than the first implantation dosage.