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公开(公告)号:US20220375403A1
公开(公告)日:2022-11-24
申请号:US17881404
申请日:2022-08-04
Applicant: NOVATEK MICROELECTRONICS CORP.
Inventor: Jhih-Siou Cheng , Chun-Fu Lin , Po-Hsiang Fang , Ju-Lin Huang
IPC: G09G3/32
Abstract: The present disclosure relates to a driving method for a display device and a display device. The display device includes a display driver, the display driver includes a plurality of driving channels each of which drives corresponding display unit according to display data in a pulse width modulation manner within one frame period, the method comprises: selectively enabling, in each sub-frame subset among a plurality of different sub-frame subsets of the frame period, different channel subset among a plurality of channel subsets of the plurality of driving channels to drive corresponding display unit, wherein each channel subset of the plurality of channel subsets includes two or more driving channels among the plurality of driving channels.
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公开(公告)号:US20220343837A1
公开(公告)日:2022-10-27
申请号:US17726558
申请日:2022-04-22
Applicant: Novatek Microelectronics Corp.
Inventor: Jhih-Siou Cheng , Chun-Fu Lin , Tung-Shuan Cheng , Po-Hsiang Fang , Ju-Lin Huang
IPC: G09G3/32
Abstract: A display driver for driving a display device including a pixel array is provided. The display driver includes a plurality of driving channels. The driving channels is configured to output driving signals in a pulse width modulation manner to drive the pixel array to illuminate in a first frame period which is being divided into a plurality of subframe periods. A first driving channel of the plurality of driving channels outputs a first driving signal in a first subframe period combination. A second driving channel of the plurality of driving channels outputs a second driving signal in a second subframe period combination different than the first subframe period combination. Each of the first subframe period combination and the second subframe period combination comprises at least one subframe period of the first frame period.
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公开(公告)号:US20220122552A1
公开(公告)日:2022-04-21
申请号:US17467443
申请日:2021-09-06
Applicant: NOVATEK Microelectronics Corp.
Inventor: Chun-Fu Lin , Hsing-Kuo Chao , Jhih-Siou Cheng , Ju-Lin Huang , Wen-Hsin Cheng
IPC: G09G3/34 , G02F1/1335 , G02F1/13357
Abstract: An LED backlight driver includes at least one driving chip configured to drive a backlight module. The at least one driving chip is disposed on at least one chip-on-film package, and not in direct contact with the backlight module to reduce heat transfer to the backlight module.
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公开(公告)号:US11295671B2
公开(公告)日:2022-04-05
申请号:US16827713
申请日:2020-03-24
Applicant: Novatek Microelectronics Corp.
Inventor: Jhih-Siou Cheng , Po-Hsiang Fang , Chieh-An Lin , Keko-Chun Liang , Ju-Lin Huang
IPC: G09G3/3258
Abstract: A display driver and a display driving method are provided. The display driving is adapted for driving a display panel and sensing an electrical characteristic of the display panel. The display driver includes a first amplifier circuit. The first amplifier circuit is coupled to the display panel. The first amplifier circuit includes a first driving circuit, a first sensing circuit and a first operational amplifier. The first operational amplifier is coupled to the display panel through a first driving line and a first sensing line. The first driving circuit is configured to provide a first driving signal to the display panel through the first operational amplifier and the first driving line during a driving period. The first sensing circuit is configured to receive a first sensing signal from the display panel through the first operational amplifier and the first sensing line during a first sensing period.
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公开(公告)号:US11276346B2
公开(公告)日:2022-03-15
申请号:US16253171
申请日:2019-01-21
Applicant: NOVATEK Microelectronics Corp.
Inventor: Jin-Yi Lin , Chieh-An Lin , Jhih-Siou Cheng , Ju-Lin Huang
IPC: G09G3/36 , G09G3/3225 , G11C27/02 , H03F3/45 , H03K3/356
Abstract: A sensing circuit for an organic light-emitting diode driver includes a sample and hold circuit and a gain amplifier. The sample and hold circuit is configured to sample a sensing signal received via an input terminal. The gain amplifier is coupled to the sample and hold circuit. The sample and hold circuit includes a first capacitor, a second capacitor, a first switch, a second switch, a third switch and a fourth switch. The first capacitor is coupled between the input terminal and the gain amplifier. The second capacitor is coupled between a reference terminal and the gain amplifier. The first switch is connected between the first capacitor and the input terminal. The second switch is connected between the second capacitor and the reference terminal. The third switch is connected between the first capacitor and the gain amplifier. The fourth switch is connected between the second capacitor and the gain amplifier.
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公开(公告)号:US10832617B2
公开(公告)日:2020-11-10
申请号:US16830286
申请日:2020-03-26
Applicant: Novatek Microelectronics Corp.
Inventor: Jhih-Siou Cheng , Tzong-Honge Shieh , Ju-Lin Huang
IPC: G09G3/3258 , G06F3/041 , G06F3/044 , G09G3/3275 , G09G3/3208
Abstract: A driver of a display panel is provided. The driver includes a plurality of sensing channels configured to receive a plurality of sensing signals from the display panel via a plurality of sensing lines and output the sensing signals, the sensing channels are coupled to the sensing lines in an arrangement selected from one of a random arrangement and a normal arrangement. The driver further includes a signal convertor coupled to the sensing channels and configured to receive the sensing signals from the sensing channels in a sequence selected from one of a random sequence and a normal sequence.
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公开(公告)号:US10725486B2
公开(公告)日:2020-07-28
申请号:US16052654
申请日:2018-08-02
Applicant: Novatek Microelectronics Corp.
Inventor: Yong-Ren Fang , Shen-Iuan Liu , Ju-Lin Huang , Tzu-Chien Tzeng , Keko-Chun Liang , Yu-Hsiang Wang , Che-Wei Yeh
IPC: G05F1/46 , H03K5/24 , G01R19/165
Abstract: A reference voltage generator includes a detecting voltage provider, a comparator, and a core circuit. The detecting voltage provider provides a detecting voltage with a first voltage level corresponding to a voltage coefficient. The comparator compares the first voltage level of the detecting voltage with a plurality of sampled amplitudes of an input signal to respectively generate a plurality of comparison results. The core circuit is used to: collect a plurality of first comparison results associated with a current received bit of a preset value from the comparison results; take the voltage coefficient as a first boundary voltage coefficient in response to the first comparison results satisfying a first condition; take the voltage coefficient as a second boundary voltage coefficient in response to the first comparison results satisfying a second condition. The reference circuit generates a reference voltage according to the first and second boundary voltage coefficients.
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公开(公告)号:US20190156754A1
公开(公告)日:2019-05-23
申请号:US16120468
申请日:2018-09-04
Applicant: Novatek Microelectronics Corp.
Inventor: Jhih-Siou Cheng , Tzong-Honge Shieh , Chieh-An Lin , Ju-Lin Huang
IPC: G09G3/3258 , G06F3/041 , G06F3/044
Abstract: A driver of a display panel is provided. The driver includes a plurality of sensing channels and a signal convertor. The plurality of sensing channels are configured to receive a plurality of sensing signals from the display panel via a plurality of sensing lines and output the sensing signals. The signal convertor are coupled to the sensing channels and configured to receive the sensing signals from the sensing channels. The signal convertor receives the sensing signals from the sensing channels in different sequences during different sensing periods.
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公开(公告)号:US10121777B2
公开(公告)日:2018-11-06
申请号:US15275492
申请日:2016-09-26
Applicant: Novatek Microelectronics Corp.
Inventor: Chun-Yu Lin , Jie-Ting Chen , Ming-Dou Ker , Tzu-Chien Tzeng , Keko-Chun Liang , Ju-Lin Huang
Abstract: A silicon controlled rectifier including a semiconductor substrate, first and second semiconductor wells, first and second semiconductor regions, third and fourth semiconductor regions and a silicide layer is provided. The first and the second semiconductor wells are formed in the semiconductor substrate. The first and the second semiconductor regions are respectively formed in the first and the second semiconductor wells in spaced apart relation. The third and the fourth semiconductor regions are respectively formed in the first and the second semiconductor wells. The silicide layer is formed on the third and the fourth semiconductor regions. The silicon controlled rectifier is at least suitable for high frequency circuit application. The silicon controlled rectifier has a relatively low trigger voltage, a relatively high electrostatic discharge level, and a relatively low capacitance.
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公开(公告)号:US20180233102A1
公开(公告)日:2018-08-16
申请号:US15954609
申请日:2018-04-17
Applicant: Novatek Microelectronics Corp.
Inventor: Ju-Lin Huang , Jhih-Siou Cheng
IPC: G09G3/36
CPC classification number: G09G3/3685 , G02F1/136286 , G09G3/3648 , G09G3/3677 , G09G2300/0426 , G09G2320/02 , G09G2320/0223
Abstract: A display panel including a plurality of pixel units, a plurality of source lines, a plurality of gate lines and a plurality of common electrode lines is provided. The pixels units are arranged in array. The array includes a plurality of columns and a plurality of rows. The source lines are respectively coupled with the pixel units disposed in a same column of the columns. The gate lines are respectively coupled with the pixel units disposed in a same row of the rows. The common electrode lines and gate lines extend parallelly with each other. At least one of the source date lines, the gate lines and the common electrode lines has the line widths varied along the extension direction thereof.
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