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公开(公告)号：US10147717B2
公开(公告)日：2018-12-04
申请号：US15247943
申请日：2016-08-26
Applicant: Novatek Microelectronics Corp.
Inventor： Federico Agustin Altolaguirre , Ming-Dou Ker , Tzu-Chien Tzeng , Ju-Lin Huang
Abstract: In the disclosure, an electrostatic discharge (ESD) protection circuit is coupled between a first power rail and a second power rail to discharge any ESD stress. The ESD protection circuit includes a detection circuit, a triggering circuit, and a dual silicon controlled rectifier (DSCR) device. When an ESD stresses is being applied to the first or second power rail, the detection circuit may first detect the ESD stresses and output a detection signal to the triggering circuit. The triggering circuit generates a triggering signal based on the detection signal and the polarity of the ESD stress. Then, the DSCR device is symmetrically triggered based on the triggering signal received at a common node between at least two transistors of the same type. The exemplary ESD protection circuit may be implemented in nanoscale manufactured integrated circuit and achieve good ESD robustness while maintaining low standby leakage current and relatively small silicon footprint.
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公开(公告)号：US09780085B1
公开(公告)日：2017-10-03
申请号：US15373491
申请日：2016-12-09
Applicant: Novatek Microelectronics Corp.
Inventor： Rong-Kun Chang , Jie-Ting Chen , Chun-Yu Lin , Ming-Dou Ker , Tzu-Chien Tzeng , Ping-Chang Lin
CPC classification number: H01L27/0292 , H01L23/60 , H01L27/0255 , H01L27/0262 , H01L27/0288 , H01L28/10 , H02H9/046
Abstract: An electronic static discharge protection apparatus provided. A plurality of ESD circuits serially coupled between a pad and a internal circuit, a first stage ESD circuit includes a ESD element directly coupled to the pad, and a last stage ESD circuit includes an inductive element directly coupled to the internal circuit, so as to improve electronic discharge protecting ability of the ESD protection apparatus and increase circuit operation bandwidth without signal loss attenuation.
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公开(公告)号：US20170069618A1
公开(公告)日：2017-03-09
申请号：US15247943
申请日：2016-08-26
Applicant: Novatek Microelectronics Corp.
Inventor： Federico Agustin Altolaguirre , Ming-Dou Ker , Tzu-Chien Tzeng , Ju-Lin Huang
CPC classification number: H01L27/0262 , H01L27/0292 , H01L27/0635 , H02H9/046
Abstract: In the disclosure, an electrostatic discharge (ESD) protection circuit is coupled between a first power rail and a second power rail to discharge any ESD stress. The ESD protection circuit includes a detection circuit, a triggering circuit, and a dual silicon controlled rectifier (DSCR) device. When an ESD stresses is being applied to the first or second power rail, the detection circuit may first detect the ESD stresses and output a detection signal to the triggering circuit. The triggering circuit generates a triggering signal based on the detection signal and the polarity of the ESD stress. Then, the DSCR device is symmetrically triggered based on the triggering signal received at a common node between at least two transistors of the same type. The exemplary ESD protection circuit may be implemented in nanoscale manufactured integrated circuit and achieve good ESD robustness while maintaining low standby leakage current and relatively small silicon footprint.
Abstract translation: 在本公开中，静电放电（ESD）保护电路耦合在第一电源轨和第二电源轨之间以排放任何ESD应力。 ESD保护电路包括检测电路，触发电路和双可控硅整流器（DSCR）装置。 当ESD应力施加到第一或第二电力轨时，检测电路可以首先检测ESD应力并将检测信号输出到触发电路。 触发电路基于检测信号和ESD应力的极性产生触发信号。 然后，基于在同一类型的至少两个晶体管之间的公共节点处接收的触发信号来对称地触发DSCR设备。 示例性ESD保护电路可以在纳米级制造的集成电路中实现，并且在保持低待机漏电流和相对较小的硅封装的同时实现良好的ESD鲁棒性。
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Patent Agency Ranking
公开(公告)号：US10121777B2
公开(公告)日：2018-11-06
申请号：US15275492
申请日：2016-09-26
Applicant: Novatek Microelectronics Corp.
Inventor： Chun-Yu Lin , Jie-Ting Chen , Ming-Dou Ker , Tzu-Chien Tzeng , Keko-Chun Liang , Ju-Lin Huang
Abstract: A silicon controlled rectifier including a semiconductor substrate, first and second semiconductor wells, first and second semiconductor regions, third and fourth semiconductor regions and a silicide layer is provided. The first and the second semiconductor wells are formed in the semiconductor substrate. The first and the second semiconductor regions are respectively formed in the first and the second semiconductor wells in spaced apart relation. The third and the fourth semiconductor regions are respectively formed in the first and the second semiconductor wells. The silicide layer is formed on the third and the fourth semiconductor regions. The silicon controlled rectifier is at least suitable for high frequency circuit application. The silicon controlled rectifier has a relatively low trigger voltage, a relatively high electrostatic discharge level, and a relatively low capacitance.
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公开(公告)号：US10476263B2
公开(公告)日：2019-11-12
申请号：US14985462
申请日：2015-12-31
Applicant: Novatek Microelectronics Corp.
Inventor： Tzu-Chien Tzeng , Jie-Ting Chen , Chun-Yu Lin , Ming-Dou Ker
IPC: H02H9/04
Abstract: An electrostatic discharge (ESD) protection device and an operation method of the ESD protection device are provided. The ESD protection device includes an ESD current rail, an ESD protection element string, and a bias circuit. A first end and a second end of the ESD protection element string are electrically connected to the ESD current rail and a signal pad, respectively. The ESD protection element string includes a first ESD protection element and a second ESD protection element that are serially connected. The bias circuit is electrically connected to the ESD protection element string to provide a bias voltage to a common connection node between the first ESD protection element and the second ESD protection element.
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公开(公告)号：US20180159318A1
公开(公告)日：2018-06-07
申请号：US15372363
申请日：2016-12-07
Applicant: NOVATEK Microelectronics Corp.
Inventor： Jie-Ting Chen , Chun-Yu Lin , Ming-Dou Ker , Ju-Lin Huang , Tzu-Chiang Lin , Tzu-Chien Tzeng
Abstract: A power rail clamp circuit is coupled between a system power supply and a ground for alleviating an electrostatic discharge effect. The power rail clamp circuit includes a first conduction circuit, a second conduction circuit, an AND gate module and a switch module. The AND gate module receives a first conduction signal generated by the first conduction circuit and a second conduction signal generated by the second conduction circuit to generate an enabling signal. The switch module conducts the power rail clamp circuit according to the enabling signal, to process an electrostatic discharge operation. The first conduction circuit is operated to prevent a high voltage value of the system power supply, and the second conduction circuit is operated to prevent a short initiation period of the system power supply.
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公开(公告)号：US20170309612A1
公开(公告)日：2017-10-26
申请号：US15275492
申请日：2016-09-26
Applicant: Novatek Microelectronics Corp.
Inventor： Chun-Yu Lin , Jie-Ting Chen , Ming-Dou Ker , Tzu-Chien Tzeng , Keko-Chun Liang , Ju-Lin Huang
IPC: H01L27/02
CPC classification number: H01L27/0262 , H01L29/0649 , H01L29/87
Abstract: A silicon controlled rectifier including a semiconductor substrate, first and second semiconductor wells, first and second semiconductor regions, third and fourth semiconductor regions and a silicide layer is provided. The first and the second semiconductor wells are formed in the semiconductor substrate. The first and the second semiconductor regions are respectively formed in the first and the second semiconductor wells in spaced apart relation. The third and the fourth semiconductor regions are respectively formed in the first and the second semiconductor wells. The silicide layer is formed on the third and the fourth semiconductor regions. The silicon controlled rectifier is at least suitable for high frequency circuit application. The silicon controlled rectifier has a relatively low trigger voltage, a relatively high electrostatic discharge level, and a relatively low capacitance.
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公开(公告)号：US20170194786A1
公开(公告)日：2017-07-06
申请号：US14985462
申请日：2015-12-31
Applicant: Novatek Microelectronics Corp.
Inventor： Tzu-Chien Tzeng , Jie-Ting Chen , Chun-Yu Lin , Ming-Dou Ker
IPC: H02H9/04
Abstract: An electrostatic discharge (ESD) protection device and an operation method of the ESD protection device are provided. The ESD protection device includes an ESD current rail, an ESD protection element string, and a bias circuit. A first end and a second end of the ESD protection element string are electrically connected to the ESD current rail and a signal pad, respectively. The ESD protection element string includes a first ESD protection element and a second ESD protection element that are serially connected. The bias circuit is electrically connected to the ESD protection element string to provide a bias voltage to a common connection node between the first ESD protection element and the second ESD protection element.
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