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公开(公告)号：US20200007085A1
公开(公告)日：2020-01-02
申请号：US16021032
申请日：2018-06-28
Applicant: NOVATEK Microelectronics Corp.
Inventor： Cheng-En Hsieh , Shen-Iuan Liu , Tzu-Chien Tzeng , Jin-Yi Lin , Kuo-Sheng Huang , Ju-Lin Huang
Abstract: A dynamic amplifier includes a first output capacitor, a first switch, a current source, a second switch, a voltage detector, a third switch and a level shifter. The first switch is coupled between a first terminal of the first output capacitor and a voltage detection node. The second switch is coupled to the current source and the voltage detection node. The voltage detector is coupled to the voltage detection node and the first switch. The third switch is coupled between the voltage detection node and a power source. The level shifter is coupled to a second terminal of the first output capacitor.
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公开(公告)号：US10789883B2
公开(公告)日：2020-09-29
申请号：US16000891
申请日：2018-06-06
Applicant: Novatek Microelectronics Corp.
Inventor： Tzu-Chien Tzeng , Po-Hsiang Fang
IPC: G09G3/3225 , G09G3/3291
Abstract: The disclosure provides a sensing apparatus and an operation method thereof. The sensing apparatus includes a sensing circuit, an analog-to-digital converter (ADC) circuit, a disturbing circuit and an output circuit. The sensing circuit is configured to output a sensing signal indicating a sensing result of a sensing line of the display panel. The ADC circuit is coupled to the sensing circuit to receive the sensing signal and outputs sensing data related to the sensing signal. The disturbing circuit is coupled to the ADC circuit to receive the sensing data and generates a time-variant disturbance component to disturb the sensing data to generate disturbed data. The output circuit is coupled to the disturbing circuit to receive the disturbed data.
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公开(公告)号：US20180198597A1
公开(公告)日：2018-07-12
申请号：US15863983
申请日：2018-01-08
Applicant: Novatek Microelectronics Corp.
Inventor： Chang-Cheng Huang , Shen-Iuan Liu , Ju-Lin Huang , Tzu-Chien Tzeng , Keko-Chun Liang , Yu-Hsiang Wang , Che-Wei Yeh
CPC classification number: H04L7/0016 , H03L7/0807 , H03L7/087 , H03L7/0891 , H03L7/0898 , H03L7/091 , H03L7/093 , H03L2207/06
Abstract: A clock and data recovery circuit with jitter tolerance enhancement is provided. The CDR circuit includes: a bang-bang phase detector, a digital filter, a digitally controlled oscillator, and an adaptive loop gain control circuit. The CDR circuit detects a loop bandwidth variation and adjusts the loop bandwidth of CDR circuit by adjusting proportional path and integral path gain factors of the digital filter of the CDR circuit. The loop gain controller uses two methods to adjust the loop gain in CDR circuit: bang-bang adjusting method and linear adjusting method.
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公开(公告)号：US10476263B2
公开(公告)日：2019-11-12
申请号：US14985462
申请日：2015-12-31
Applicant: Novatek Microelectronics Corp.
Inventor： Tzu-Chien Tzeng , Jie-Ting Chen , Chun-Yu Lin , Ming-Dou Ker
IPC: H02H9/04
Abstract: An electrostatic discharge (ESD) protection device and an operation method of the ESD protection device are provided. The ESD protection device includes an ESD current rail, an ESD protection element string, and a bias circuit. A first end and a second end of the ESD protection element string are electrically connected to the ESD current rail and a signal pad, respectively. The ESD protection element string includes a first ESD protection element and a second ESD protection element that are serially connected. The bias circuit is electrically connected to the ESD protection element string to provide a bias voltage to a common connection node between the first ESD protection element and the second ESD protection element.
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公开(公告)号：US20190113939A1
公开(公告)日：2019-04-18
申请号：US16052654
申请日：2018-08-02
Applicant: Novatek Microelectronics Corp.
Inventor： Yong-Ren Fang , Shen-Iuan Liu , Ju-Lin Huang , Tzu-Chien Tzeng , Keko-Chun Liang , Yu-Hsiang Wang , Che-Wei Yeh
IPC: G05F1/46 , H03K5/24 , G01R19/165
CPC classification number: G05F1/46 , G01R19/16528 , H03K5/24
Abstract: A reference voltage generator includes a detecting voltage provider, a comparator, and a core circuit. The detecting voltage provider provides a detecting voltage with a first voltage level corresponding to a voltage coefficient. The comparator compares the first voltage level of the detecting voltage with a plurality of sampled amplitudes of an input signal to respectively generate a plurality of comparison results. The core circuit is used to: collect a plurality of first comparison results associated with a current received bit of a preset value from the comparison results; take the voltage coefficient as a first boundary voltage coefficient in response to the first comparison results satisfying a first condition; take the voltage coefficient as a second boundary voltage coefficient in response to the first comparison results satisfying a second condition. The reference circuit generates a reference voltage according to the first and second boundary voltage coefficients.
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Patent Agency Ranking
公开(公告)号：US20180159318A1
公开(公告)日：2018-06-07
申请号：US15372363
申请日：2016-12-07
Applicant: NOVATEK Microelectronics Corp.
Inventor： Jie-Ting Chen , Chun-Yu Lin , Ming-Dou Ker , Ju-Lin Huang , Tzu-Chiang Lin , Tzu-Chien Tzeng
Abstract: A power rail clamp circuit is coupled between a system power supply and a ground for alleviating an electrostatic discharge effect. The power rail clamp circuit includes a first conduction circuit, a second conduction circuit, an AND gate module and a switch module. The AND gate module receives a first conduction signal generated by the first conduction circuit and a second conduction signal generated by the second conduction circuit to generate an enabling signal. The switch module conducts the power rail clamp circuit according to the enabling signal, to process an electrostatic discharge operation. The first conduction circuit is operated to prevent a high voltage value of the system power supply, and the second conduction circuit is operated to prevent a short initiation period of the system power supply.
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公开(公告)号：US20170309612A1
公开(公告)日：2017-10-26
申请号：US15275492
申请日：2016-09-26
Applicant: Novatek Microelectronics Corp.
Inventor： Chun-Yu Lin , Jie-Ting Chen , Ming-Dou Ker , Tzu-Chien Tzeng , Keko-Chun Liang , Ju-Lin Huang
IPC: H01L27/02
CPC classification number: H01L27/0262 , H01L29/0649 , H01L29/87
Abstract: A silicon controlled rectifier including a semiconductor substrate, first and second semiconductor wells, first and second semiconductor regions, third and fourth semiconductor regions and a silicide layer is provided. The first and the second semiconductor wells are formed in the semiconductor substrate. The first and the second semiconductor regions are respectively formed in the first and the second semiconductor wells in spaced apart relation. The third and the fourth semiconductor regions are respectively formed in the first and the second semiconductor wells. The silicide layer is formed on the third and the fourth semiconductor regions. The silicon controlled rectifier is at least suitable for high frequency circuit application. The silicon controlled rectifier has a relatively low trigger voltage, a relatively high electrostatic discharge level, and a relatively low capacitance.
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公开(公告)号：US20170194786A1
公开(公告)日：2017-07-06
申请号：US14985462
申请日：2015-12-31
Applicant: Novatek Microelectronics Corp.
Inventor： Tzu-Chien Tzeng , Jie-Ting Chen , Chun-Yu Lin , Ming-Dou Ker
IPC: H02H9/04
Abstract: An electrostatic discharge (ESD) protection device and an operation method of the ESD protection device are provided. The ESD protection device includes an ESD current rail, an ESD protection element string, and a bias circuit. A first end and a second end of the ESD protection element string are electrically connected to the ESD current rail and a signal pad, respectively. The ESD protection element string includes a first ESD protection element and a second ESD protection element that are serially connected. The bias circuit is electrically connected to the ESD protection element string to provide a bias voltage to a common connection node between the first ESD protection element and the second ESD protection element.
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公开(公告)号：US11244621B2
公开(公告)日：2022-02-08
申请号：US16820805
申请日：2020-03-17
Applicant: NOVATEK MICROELECTRONICS CORP.
Inventor： Chieh-An Lin , Tzu-Chien Tzeng
IPC: G09G3/3225 , G09G3/3258
Abstract: A differential input circuit and a driving circuit including the same are provided. The differential input circuit transforms an analog voltage signal corresponding to a sensing line on an OLED panel to a pair of differential input signals being output to a gain amplifier. The differential input circuit includes a sampling circuit and a scaling circuit. The sampling circuit receives the analog voltage signal and a reference voltage through a first scaling path and a second scaling path, respectively. The scaling circuit includes a first scaling path and a second scaling path. The first scaling path and the second scaling path collectively generate the pair of differential input signals, based on a first shift voltage, a first scaled voltage, a second shift voltage, and a second scaled voltage. The first shift voltage is less than the second shift voltage.
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公开(公告)号：US10594264B2
公开(公告)日：2020-03-17
申请号：US16021032
申请日：2018-06-28
Applicant: NOVATEK Microelectronics Corp.
Inventor： Cheng-En Hsieh , Shen-Iuan Liu , Tzu-Chien Tzeng , Jin-Yi Lin , Kuo-Sheng Huang , Ju-Lin Huang
Abstract: A dynamic amplifier includes a first output capacitor, a first switch, a current source, a second switch, a voltage detector, a third switch and a level shifter. The first switch is coupled between a first terminal of the first output capacitor and a voltage detection node. The second switch is coupled to the current source and the voltage detection node. The voltage detector is coupled to the voltage detection node and the first switch. The third switch is coupled between the voltage detection node and a power source. The level shifter is coupled to a second terminal of the first output capacitor.
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