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公开(公告)号：US11764148B2
公开(公告)日：2023-09-19
申请号：US17582220
申请日：2022-01-24
发明人： Tzu-Ching Tsai
IPC分类号： H01L23/522 , H01L23/48 , H01L23/532 , H01L23/00 , H01L23/528 , H01L25/065 , H01L25/00 , H01L21/768
CPC分类号： H01L23/5226 , H01L21/76898 , H01L23/481 , H01L23/5283 , H01L23/53228 , H01L24/09 , H01L24/17 , H01L25/0657 , H01L25/50 , H01L2224/02381 , H01L2224/0401
摘要： A method for forming an integrated circuit device includes providing a first substrate having a first conductive portion, providing a second substrate having a second conductive portion, performing a first chemical reaction to form a first expanding pad on the first conductive portion to provide a first expanded contact area, performing a second chemical reaction to form a second expanding pad on the second conductive portion to provide a second expanded contact area, and bonding the first substrate to the second substrate with a bonding structure.
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公开(公告)号：US11527493B2
公开(公告)日：2022-12-13
申请号：US17538090
申请日：2021-11-30
发明人： Tzu-Ching Tsai
摘要： The present disclosure provides a method for preparing a semiconductor device structure. The method includes forming a first metal plug, a second metal plug, a third metal plug, and a fourth metal plug over a semiconductor substrate; forming an energy removable liner covering the first metal plug, the second metal plug, the third metal plug, and the fourth metal plug; performing an etching process to remove a portion of the energy removable layer from the substrate, while remaining an energy removable block between the first metal plug and the second metal plug in the cell region; forming a dielectric layer covering the energy removable block and the first metal plug, the second metal plug, the third metal plug, and the fourth metal plug; performing a thermal treating process to transform the energy removable layer into a first air gap structure including a first air gap enclosed by liner layer.
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公开(公告)号：US11011522B2
公开(公告)日：2021-05-18
申请号：US16582337
申请日：2019-09-25
发明人： Tzu-Ching Tsai
IPC分类号： H01L27/108
摘要： The present application discloses a semiconductor device with nanowire plugs and a method for fabricating the semiconductor device. The semiconductor device includes a substrate having first regions and second regions; a plurality of capacitor contacts positioned over the second regions, at least one of the capacitor contacts having a neck portion and a head portion over the neck portion, wherein an upper width of the head portion is larger than an upper width of the neck portion; a plurality of bit line contacts positioned over the first regions and a plurality of bit lines positioned over the bit line contacts; a plurality of capacitor plugs disposed over the capacitor contacts, wherein at least one of the plurality of capacitor plugs includes a plurality of nanowires, a conductive liner disposed over the nanowires, and a conductor disposed over the conductive liner; and a plurality of capacitor structures disposed respectively over the capacitor plugs.
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公开(公告)号：US12022649B2
公开(公告)日：2024-06-25
申请号：US17729250
申请日：2022-04-26
发明人： Tzu-Ching Tsai
IPC分类号： H10B12/00 , H01L21/768 , H01L23/532
CPC分类号： H10B12/482 , H01L21/76811 , H01L21/76832 , H01L21/76835 , H01L23/53209 , H01L23/53295
摘要： The present application provides a memory device having a bit line (BL) with a stepped profile. The memory device includes a semiconductor substrate including a first surface; and a bit line disposed on the first surface of the semiconductor substrate, wherein the bit line includes a first dielectric layer, a conductive layer disposed over the first dielectric layer, a second dielectric layer disposed over the conductive layer, and a spacer surrounding the first dielectric layer, the conductive layer and the second dielectric layer, wherein the second dielectric layer includes a first portion surrounded by the spacer, and a second portion disposed over the first portion and exposed through the spacer, wherein a first width of the first portion is substantially greater than a second width of the second portion.
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5.发明授权公开(公告)号：US12125744B2
公开(公告)日：2024-10-22
申请号：US17670751
申请日：2022-02-14
发明人： Tzu-Ching Tsai
IPC分类号： H01L21/768 , H01L23/532 , H01L23/535 , H10B12/00
CPC分类号： H01L21/7682 , H01L21/76828 , H01L21/76829 , H01L21/76841 , H01L21/76895 , H01L23/5329 , H01L23/535 , H10B12/00
摘要： The present disclosure provides a semiconductor device with a composite conductive feature and an air gap and a method for preparing the semiconductor device. The semiconductor device includes a first composite conductive feature and a second composite conductive feature disposed over a pattern-dense region of a semiconductor substrate. The semiconductor device also includes a third composite conductive feature and a fourth composite conductive feature disposed over a pattern-loose region of the semiconductor substrate. The semiconductor device further includes a dielectric layer disposed over the pattern-dense region and the pattern-loose region of the semiconductor substrate. A first portion of the dielectric layer between the first composite conductive feature and the second composite conductive feature is separated from the semiconductor substrate by an air gap, and a second portion of the dielectric layer between the third composite conductive feature and the fourth composite conductive feature is in direct contact with the semiconductor substrate.
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公开(公告)号：US11758712B1
公开(公告)日：2023-09-12
申请号：US17730065
申请日：2022-04-26
发明人： Tzu-Ching Tsai
IPC分类号： H10B12/00
CPC分类号： H10B12/482
摘要： A method for preparing a semiconductor structure includes providing a semiconductor substrate having a first surface; disposing a first dielectric layer over the first surface of the semiconductor substrate, a conductive layer over the first dielectric layer, and a second dielectric layer over the conductive layer; disposing a patterned mask over the second dielectric layer; removing portions of the second dielectric layer, the conductive layer and the first dielectric layer exposed through the patterned mask to form a first trench; forming a spacer surrounding the first dielectric layer, the conductive layer and the second dielectric layer; disposing an energy-decomposable mask over the second dielectric layer and the spacer; irradiating a portion of the energy-decomposable mask by an electromagnetic radiation; removing the portion of the energy-decomposable mask irradiated by the electromagnetic radiation; and removing a portion of the second dielectric layer exposed through the energy-decomposable mask.
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公开(公告)号：US11315871B2
公开(公告)日：2022-04-26
申请号：US16440292
申请日：2019-06-13
发明人： Tzu-Ching Tsai
IPC分类号： H01L23/522 , H01L23/48 , H01L23/532 , H01L23/00 , H01L23/528 , H01L25/065 , H01L25/00 , H01L21/768
摘要： An integrated circuit device includes a first substrate, a second substrate, a first expanding pad, a second expanding pad and a bonding structure. The first substrate is provided with a first conductive portion, the second substrate is provided with a second conductive portion, the first expanding pad is formed on the first conductive portion to provide a first expanded contact area, the second expanding pad is formed on the second conductive portion to provide a second expanded contact area, and the bonding structure is formed between the first substrate and the second substrate, wherein the first expanding pad is bonded to the second expanding pad.
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公开(公告)号：US11309263B2
公开(公告)日：2022-04-19
申请号：US16871923
申请日：2020-05-11
发明人： Tzu-Ching Tsai
摘要： The present disclosure provides a semiconductor device structure with an air gap structure and a method for forming the semiconductor device structure. The semiconductor device structure includes a first conductive contact and a second conductive contact disposed over a semiconductor substrate. The semiconductor device structure also includes a first dielectric layer surrounding the first conductive contact and the second conductive contact, and a second dielectric layer disposed over the first conductive contact, the second conductive contact and the first dielectric layer. The first dielectric layer is separated from the semiconductor substrate by a first air gap structure, the first dielectric layer is separated from the second dielectric layer by a second air gap structure, and the air gap structures reduce capacitive coupling between conductive features.
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公开(公告)号：US11264474B1
公开(公告)日：2022-03-01
申请号：US16996170
申请日：2020-08-18
发明人： Tzu-Ching Tsai
IPC分类号： H01L29/423 , H01L29/40 , H01L21/8234 , H01L29/06 , H01L21/762
摘要： The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a pad oxide layer positioned on the substrate, a hard mask layer positioned on the pad oxide layer, an isolation layer positioned along the hard mask layer and the pad oxide layer and extending to the substrate, a first dielectric layer positioned between the substrate and the isolation layer, and a liner layer positioned on a top surface of the hard mask layer and positioned between the first dielectric layer and the isolation layer, between the pad oxide layer and the isolation layer, and between the hard mask layer and the isolation layer. The hard mask layer and the liner layer include boron nitride.
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