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公开(公告)号:US20170256527A1
公开(公告)日:2017-09-07
申请号:US15600526
申请日:2017-05-19
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Wataru Tsukada , Masayuki Honda , Yoshihisa Fukushima , Scott Richard Cyr
IPC: H01L25/18 , G11C5/04 , G11C5/06 , H01L25/065
CPC classification number: H01L25/18 , G11C5/04 , G11C5/063 , G11C7/1048 , G11C29/025 , G11C29/50008 , G11C2207/105 , H01L23/5386 , H01L25/0655 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor module includes a module substrate, a line pattern provided to the module substrate, first and second semiconductor chips on the module substrate and coupled to the line pattern, and a termination resister on the module substrate and coupled to the line pattern, the termination resistor being located between the first and second semiconductor chips.
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公开(公告)号:US20160064366A1
公开(公告)日:2016-03-03
申请号:US14839771
申请日:2015-08-28
Applicant: Micron Technology, Inc.
Inventor: Wataru Tsukada , Masayuki Honda , Yoshihisa Fukushima , Scott Richard Cyr
IPC: H01L25/18 , G11C5/02 , H01L23/522 , H01L25/065 , H01L23/498
CPC classification number: H01L25/18 , G11C5/04 , G11C5/063 , G11C7/1048 , G11C29/025 , G11C29/50008 , G11C2207/105 , H01L23/5386 , H01L25/0655 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor module includes a module substrate, a line pattern provided to the module substrate, first and second semiconductor chips on the module substrate and coupled to the line pattern, and a termination resister on the module substrate and coupled to the line pattern, the termination resistor being located between the first and second semiconductor chips.
Abstract translation: 半导体模块包括模块基板,提供给模块基板的线图案,模块基板上的第一和第二半导体芯片,并且耦合到线图案,以及模块基板上的端接电阻并耦合到线路图案,终端 电阻器位于第一和第二半导体芯片之间。
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公开(公告)号:US10199363B2
公开(公告)日:2019-02-05
申请号:US15600526
申请日:2017-05-19
Applicant: Micron Technology, Inc.
Inventor: Wataru Tsukada , Masayuki Honda , Yoshihisa Fukushima , Scott Richard Cyr
IPC: H01L23/538 , H01L25/18 , H01L25/065 , G11C5/04 , G11C5/06 , G11C29/02 , G11C29/50 , G11C7/10
Abstract: A semiconductor module includes a module substrate, a line pattern provided to the module substrate, first and second semiconductor chips on the module substrate and coupled to the line pattern, and a termination resister on the module substrate and coupled to the line pattern, the termination resistor being located between the first and second semiconductor chips.
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公开(公告)号:US09691744B2
公开(公告)日:2017-06-27
申请号:US14839771
申请日:2015-08-28
Applicant: Micron Technology, Inc.
Inventor: Wataru Tsukada , Masayuki Honda , Yoshihisa Fukushima , Scott Richard Cyr
IPC: H01L23/13 , H01L25/18 , H01L25/065 , G11C5/04 , G11C5/06 , G11C29/02 , G11C29/50 , G11C7/10 , H01L23/538
CPC classification number: H01L25/18 , G11C5/04 , G11C5/063 , G11C7/1048 , G11C29/025 , G11C29/50008 , G11C2207/105 , H01L23/5386 , H01L25/0655 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor module includes a module substrate, a line pattern provided to the module substrate, first and second semiconductor chips on the module substrate and coupled to the line pattern, and a termination resister on the module substrate and coupled to the line pattern, the termination resistor being located between the first and second semiconductor chips.
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