公开(公告)号：US20240038707A1

公开(公告)日：2024-02-01

申请号：US17875778

申请日：2022-07-28

Applicant: Micron Technology, Inc.

Inventor： Andrew M. Bayless ,  Cassie M. Bayless ,  Brandon P. Wirz

IPC: H01L23/00

CPC classification number: H01L24/16 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/16145 ,  H01L2224/13019 ,  H01L2224/13582 ,  H01L2224/81815 ,  H01L2224/13147 ,  H01L2224/13144 ,  H01L2224/13139 ,  H01L2224/13124 ,  H01L2224/13184 ,  H01L2224/13157 ,  H01L2224/13155 ,  H01L2224/13109 ,  H01L2224/1369 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/13647 ,  H01L2224/13613 ,  H01L2224/13609 ,  H01L2224/13618 ,  H01L2224/1362

Abstract: In some embodiments, an interconnection structure can electrically and physically couple a first semiconductor die and a second semiconductor die. The interconnection structure can include a first portion at the first semiconductor die and a second portion at the second semiconductor die. The first portion can include a first conductive pillar with a concave bonding surface, a first annular barrier layer, and a first annular solder layer. The first annular barrier layer can surround a sidewall of the first conductive pillar, and the first annular solder layer can surround the first barrier layer. The second portion can include a second conductive pillar having a convex bonding surface, the convex bonding surface coupled to the concave bonding surface. The second interconnection structure can further include a second annular solder layer surrounding a second annular barrier layer surrounding the second conductive pillar.