公开(公告)号：US20240195396A1

公开(公告)日：2024-06-13

申请号：US18531232

申请日：2023-12-06

Applicant: Microchip Technology Incorporated

Inventor： Jiachi Yu ,  Henry Liang ,  James Ho ,  Galin I. Ivanov ,  Kevin Yang ,  Dixon Chen ,  Congqing Xiong ,  Hongming An

IPC: H03K5/1252 ,  H03K19/20

CPC classification number: H03K5/1252 ,  H03K19/20 ,  H03K2005/00019

Abstract: Reducing emissions of predetermined frequencies using delay elements and related apparatuses, methods, and systems are disclosed. An apparatus includes an input terminal to receive a signal, delay elements electrically connected to the input terminal, an output terminal to provide a reduced slew rate signal, and combination circuitry electrically connected to the delay elements and the output terminal. The delay elements provide delayed signals responsive to the received signal. Respective ones of the delayed signals include delayed versions of the received signal. The combination circuitry combines the delayed signals to generate the reduced slew rate signal. Delays associated with the delay elements are chosen to reduce emissions of one or more predetermined frequencies of the reduced slew rate signal as compared to the received signal.

公开(公告)号：US20210056060A1

公开(公告)日：2021-02-25

申请号：US16588562

申请日：2019-09-30

Applicant: Microchip Technology Incorporated

Inventor： Hongming An ,  James Ho ,  Congqing Xiong ,  Henry Liang ,  John Junling Zang

IPC: G06F13/40 ,  G06F9/30 ,  G06F9/4401 ,  G06F1/10

Abstract: Circuitry of a physical layer for interfacing with a communication bus of a wired local area network is disclosed. The circuitry includes a variable delay driver operably coupled to a communication bus. The communication bus includes a shared transmission medium. The variable delay driver is configured to control a slew rate of a driven transmit signal at the driver output. The circuitry also includes receiver circuitry operably coupled to the communication bus. The circuitry further includes a common mode dimmer operably coupled to the receiver circuitry and the communication bus. The common mode dimmer is configured to protect the receiver circuitry from common mode interference.

公开(公告)号：US20230268891A1

公开(公告)日：2023-08-24

申请号：US17664086

申请日：2022-05-19

Applicant: Microchip Technology Incorporated

Inventor： Henry Liang ,  Hongming An ,  James Ho ,  Congqing Xiong

IPC: H03F1/56 ,  H03F1/52

CPC classification number: H03F1/56 ,  H03F1/523 ,  H03F2200/264 ,  H03F2200/426

Abstract: This description relates, generally, to protecting a circuit from an input voltage. Various examples include an apparatus including one or more circuits to draw current from, or provide current to, a pair of connectors for an input circuit. The connectors may be for electrical coupling to first and second terminals of a twisted pair. The one or more circuits may be at least partially responsive to positive and negative biasing signals. The apparatus may additionally include an operational amplifier to generate the positive and negative biasing signals. The operational amplifier may include: a first input terminal at least partially responsive to a reference voltage and a second input terminal at least partially responsive to a common-mode voltage of the input circuit. Related systems and methods are also disclosed.

公开(公告)号：US11074209B2

公开(公告)日：2021-07-27

申请号：US16588562

申请日：2019-09-30

Applicant: Microchip Technology Incorporated

Inventor： Hongming An ,  James Ho ,  Congqing Xiong ,  Henry Liang ,  John Junling Zang

IPC: G06F13/40 ,  G06F1/10 ,  G06F9/4401 ,  G06F9/30

Abstract: Circuitry of a physical layer for interfacing with a communication bus of a wired local area network is disclosed. The circuitry includes a variable delay driver operably coupled to a communication bus. The communication bus includes a shared transmission medium. The variable delay driver is configured to control a slew rate of a driven transmit signal at the driver output. The circuitry also includes receiver circuitry operably coupled to the communication bus. The circuitry further includes a common mode dimmer operably coupled to the receiver circuitry and the communication bus. The common mode dimmer is configured to protect the receiver circuitry from common mode interference.