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    Fast initial phase search for digital clock and data recovery and related systems, devices, and methods
    1.
    发明授权
    Fast initial phase search for digital clock and data recovery and related systems, devices, and methods 有权

    公开(公告)号：US11374731B2

    公开(公告)日：2022-06-28

    申请号：US17445811

    申请日：2021-08-24

    Applicant: Microchip Technology Incorporated

    Inventor： Jiachi Yu ,  Dixon Chen ,  Kevin Yang

    IPC: H04L7/02 ,  H04L7/00

    Abstract: Systems, devices, and methods related to selecting a sample phase of a signal are disclosed. A method includes sampling a signal including a plurality of symbols with a plurality of different sample phases to obtain sample values of each of the plurality of symbols at each of the plurality of different sample phases. The signal is received from a shared transmission medium. The method also includes determining an edge sample phase of the plurality of different sample phases that corresponds to edges of the symbols based on the sample values. The method further includes determining a center sample phase of the plurality of different sample phases based on the determined edge sample phase, and using the determined center sample phase to determine values of the symbols.

    FAST INITIAL PHASE SEARCH FOR DIGITAL CLOCK AND DATA RECOVERY AND RELATED SYSTEMS, DEVICES, AND METHODS
    5.
    发明申请
    FAST INITIAL PHASE SEARCH FOR DIGITAL CLOCK AND DATA RECOVERY AND RELATED SYSTEMS, DEVICES, AND METHODS 有权

    公开(公告)号：US20210385061A1

    公开(公告)日：2021-12-09

    申请号：US17445811

    申请日：2021-08-24

    Applicant: Microchip Technology Incorporated

    Inventor： Jiachi Yu ,  Dixon Chen ,  Kevin Yang

    IPC: H04L7/02 ,  H04L7/00

    Abstract: Systems, devices, and methods related to selecting a sample phase of a signal are disclosed. A method includes sampling a signal including a plurality of symbols with a plurality of different sample phases to obtain sample values of each of the plurality of symbols at each of the plurality of different sample phases. The signal is received from a shared transmission medium. The method also includes determining an edge sample phase of the plurality of different sample phases that corresponds to edges of the symbols based on the sample values. The method further includes determining a center sample phase of the plurality of different sample phases based on the determined edge sample phase, and using the determined center sample phase to determine values of the symbols.

    SIGNAL TO NOISE RATIO AND BIT ERROR RATE ESTIMATION FOR WIRED LOCAL AREA NETWORKS AND RELATED SYSTEMS, DEVICES, AND METHODS
    6.
    发明申请
    SIGNAL TO NOISE RATIO AND BIT ERROR RATE ESTIMATION FOR WIRED LOCAL AREA NETWORKS AND RELATED SYSTEMS, DEVICES, AND METHODS 有权

    公开(公告)号：US20210058268A1

    公开(公告)日：2021-02-25

    申请号：US16588764

    申请日：2019-09-30

    Applicant: Microchip Technology Incorporated

    Inventor： Jiachi Yu ,  Dixon Chen ,  Kevin Yang

    IPC: H04L12/40 ,  H04B17/309 ,  H04L12/413

    Abstract: Systems, device, and methods related to estimating a Signal to Noise Ratio (SNR) of a signal are disclosed. A method of estimating an SNR includes setting a threshold of a comparator of a physical layer device to a first value, applying a signal to the comparator, and determining a first bit error number of an output of the comparator with the threshold set at the first value. The method also includes setting the threshold of the comparator to a second value that is different from the first value, applying the signal to the comparator, and determining a second bit error number of the output of the comparator with the threshold set at the second value. The method further includes determining an SNR of the signal based on the first bit error number and the second bit error number.

    Scramble of Payload and Preamble in 10SPE
    7.
    发明申请
    Scramble of Payload and Preamble in 10SPE 审中-公开

    公开(公告)号：US20190268452A1

    公开(公告)日：2019-08-29

    申请号：US16007119

    申请日：2018-06-13

    Applicant: Microchip Technology Incorporated

    Inventor： Jiachi Yu ,  Dixon Chen ,  Hongming An ,  John Zang ,  Kevin Yang

    IPC: H04L29/08

    Abstract: An apparatus includes an encoder circuit and a scrambler circuit configured to receive a frame, the frame including a preamble and a payload. The scrambler circuit is further configured to scramble contents of the frame including the payload and at least a portion of the preamble, provide synchronization information with results of scrambling the contents, and send results of scrambling the contents to the encoder circuit.

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