-
公开(公告)号：US20190238167A1
公开(公告)日：2019-08-01
申请号：US16237740
申请日：2019-01-01
Applicant: MEDIATEK INC.
Inventor： Sheng-Che Tseng , Yu-Lin Hsieh , Ming-Yu Hsieh , Shih-Chieh Yen , Jen-Kuei Tsai
CPC classification number: H04B1/0475 , H04B1/30 , H04B1/525 , H04B2001/0491 , H04B2001/307 , H04W88/06
Abstract: A wireless communication device includes a first wireless communication system and a second wireless communication system. Regarding the first wireless communication system, an up-conversion circuit up-converts a first transmit (TX) signal in a baseband to generate a second TX signal with a first carrier frequency, and a front-end circuit transmits the second TX signal to another wireless communication device. Regarding the second wireless communication system, a first down-conversion circuit down-converts a first receive (RX) signal with a second carrier frequency to generate a second RX signal with a third carrier frequency, and a second down-conversion circuit down-converts the second RX signal with the third carrier frequency to generate a third RX signal in the baseband. The third carrier frequency is different from all fundamental frequencies included in a band combination that is employed at the first wireless communication system and is supported by another wireless communication device.
-
2.发明申请METHOD FOR GENERATING A PLURALITY OF OSCILLATING SIGNALS WITH DIFFERENT PHASES AND ASSOCIATED CIRCUIT AND LOCAL OSCILLATOR 审中-公开用于产生具有不同相位和相关电路和本地振荡器的振荡信号的多项式的方法公开(公告)号：US20170012584A1
公开(公告)日：2017-01-12
申请号：US15098307
申请日：2016-04-13
Applicant: MEDIATEK INC.
Inventor： Yueh-Ting Lee , Yao-Chi Wang , Sheng-Che Tseng
CPC classification number: H03B27/00 , H03K5/14 , H03K21/02 , H03K2005/00234 , H03L7/00 , H03L7/0812
Abstract: A circuit for generating a plurality of oscillating signals with different phases includes a frequency divider, a first delay chain, a second delay chain and a calibration circuit. The frequency divider is arranged for frequency dividing a first input signal and a second input signal to generate a first frequency-divided input signal and a second frequency-divided input signal. The first delay chain is arranged for delaying the first frequency-divided input signal, and the second delay chain is arranged for delaying the second frequency-divided input signal. The calibration circuit is arranged for controlling delay amounts of the first delay chain and the second delay chain according to signals within the first delay chain or the second delay chain; wherein output signals of a portion delay cells within the first delay chain and the second delay chain serve as the plurality of oscillating signals with different phases.
Abstract translation: 用于产生具有不同相位的多个振荡信号的电路包括分频器，第一延迟链，第二延迟链和校准电路。 分频器被布置用于对第一输入信号和第二输入信号进行分频，以产生第一分频输入信号和第二分频输入信号。 第一延迟链被布置用于延迟第一分频输入信号，并且第二延迟链被布置用于延迟第二分频输入信号。 校准电路被配置为根据第一延迟链或第二延迟链内的信号来控制第一延迟链和第二延迟链的延迟量; 其中所述第一延迟链和所述第二延迟链内的部分延迟单元的输出信号用作具有不同相位的多个振荡信号。
-
3.发明授权公开(公告)号：US09998160B2
公开(公告)日：2018-06-12
申请号：US15465737
申请日：2017-03-22
Applicant: MEDIATEK INC.
Inventor： Tzyuan Shiu , Sheng-Che Tseng , Shih-Chieh Yen , Chi-Yao Yu
IPC: H04B1/40 , H04B1/12 , H04L25/03 , H04L27/152
CPC classification number: H04B1/123 , H04B15/06 , H04L25/03 , H04L27/152
Abstract: A method for avoiding inter-modulation distortion in a communications apparatus capable of supporting carrier aggregation and communicating with a peer communications apparatus in a wireless network via at least a first CC and a second CC includes: determining a frequency adjustment value for adjusting a first oscillating frequency of a first local oscillation signal utilized for processing an RF signal of the first CC or a second oscillating frequency of a second LO signal utilized for processing an RF signal of the second CC when an RF signal or a baseband signal of the second CC is interfered with by an inter-modulation distortion signal contributed by any signal component related to the first CC; and adjusting the first oscillating frequency or the second oscillating frequency according to the frequency adjustment value.
-
公开(公告)号：US09531358B2
公开(公告)日：2016-12-27
申请号：US14685607
申请日：2015-04-14
Applicant: MEDIATEK INC.
Inventor： Sheng-Che Tseng , Yao-Chi Wang
CPC classification number: H03K5/06 , H03K5/1565 , H03K19/21
Abstract: A signal generating system for generating an output signal with a 50% duty cycle, comprising: a frequency dividing module, comprising an odd number of level triggering devices, for generating a plurality of frequency divided signals utilizing a frequency dividing ratio equaling to M, wherein the M is an positive integer; and a signal combining module, for combining at least two of the frequency divided signals to generate at least one output combined signal. The signal generating system generates the output signal based on the output combined signal. The frequency dividing module cooperates the signal combining module to provide a frequency dividing ratio equaling to N.5, wherein the N is a positive integer.
Abstract translation: 一种用于产生具有50％占空比的输出信号的信号发生系统，包括：分频模块，包括奇数级触发装置，用于利用等于M的分频比来产生多个分频信号，其中 M是正整数; 以及信号组合模块，用于组合至少两个所述分频信号以产生至少一个输出组合信号。 信号发生系统基于输出组合信号产生输出信号。 分频模块协同信号组合模块提供等于N.5的分频比，其中N是正整数。
-
公开(公告)号：US20150061733A1
公开(公告)日：2015-03-05
申请号：US14470909
申请日：2014-08-27
Applicant: MEDIATEK INC
Inventor： Sheng-Che Tseng
IPC: H03B19/14
CPC classification number: H03B19/14 , H03K21/023
Abstract: A frequency dividing system, which comprises a control circuit, a first multiple input sharing input level triggering device, a first input level triggering group and a second input level triggering group. The first multiple input sharing input level triggering device receives a first frequency dividing signal to generate a feedback signal according to a level of a first clock signal, or receives a second frequency dividing signal to generate the feedback signal according to a level of a second clock signal. The first/second input level triggering group generates the first/second frequency dividing signal to the first multiple input sharing input level triggering device according to the feedback signal if active; and outputs a fixed voltage to the first multiple input sharing input level triggering device if non-active.
Abstract translation: 一种分频系统，包括控制电路，第一多输入共享输入电平触发装置，第一输入电平触发组和第二输入电平触发组。 第一多输入共享输入电平触发装置接收第一分频信号以根据第一时钟信号的电平产生反馈信号，或接收第二分频信号以根据第二时钟的电平产生反馈信号 信号。 如果有效，第一/第二输入电平触发组根据反馈信号产生第一/第二分频信号到第一多输入共享输入电平触发装置; 并且如果不是有效的则将固定电压输出到第一多输入共享输入电平触发装置。
-
Patent Agency Ranking
公开(公告)号：US09054639B2
公开(公告)日：2015-06-09
申请号：US14470909
申请日：2014-08-27
Applicant: MEDIATEK INC.
Inventor： Sheng-Che Tseng
CPC classification number: H03B19/14 , H03K21/023
Abstract: A frequency dividing system, which comprises a control circuit, a first multiple input sharing input level triggering device, a first input level triggering group and a second input level triggering group. The first multiple input sharing input level triggering device receives a first frequency dividing signal to generate a feedback signal according to a level of a first clock signal, or receives a second frequency dividing signal to generate the feedback signal according to a level of a second clock signal. The first/second input level triggering group generates the first/second frequency dividing signal to the first multiple input sharing input level triggering device according to the feedback signal if active; and outputs a fixed voltage to the first multiple input sharing input level triggering device if non-active.
Abstract translation: 一种分频系统，包括控制电路，第一多输入共享输入电平触发装置，第一输入电平触发组和第二输入电平触发组。 第一多输入共享输入电平触发装置接收第一分频信号以根据第一时钟信号的电平产生反馈信号，或接收第二分频信号以根据第二时钟的电平产生反馈信号 信号。 如果有效，第一/第二输入电平触发组根据反馈信号产生第一/第二分频信号到第一多输入共享输入电平触发装置; 并且如果不是有效的则将固定电压输出到第一多输入共享输入电平触发装置。
-
公开(公告)号：US10516432B2
公开(公告)日：2019-12-24
申请号：US15729404
申请日：2017-10-10
Applicant: MediaTek Inc.
Inventor： Sheng-Che Tseng , Shih-Chieh Yen , Chi-Yao Yu , Chao-Wei Wang
Abstract: According to at least one aspect, a communication system is provided. The communication system includes a first switch device configured to receive a first plurality of radio frequency (RF) signals detected by an antenna array and provide an RF signal selected from among the first plurality of RF signals to a receiver circuit, the first plurality of RF signals comprising a first RF signal in a first frequency range and a second RF signal in a second frequency range that is different from the first frequency range; and a second switch device configured to receive a second plurality of RF signals detected by the antenna array and provide an RF signal selected from among the second plurality of RF signals to the receiver circuit, the second plurality of RF signals comprising a third RF signal in the first frequency range and a fourth RF signal in the second frequency range.
-
公开(公告)号：US10164574B2
公开(公告)日：2018-12-25
申请号：US15098307
申请日：2016-04-13
Applicant: MEDIATEK INC.
Inventor： Yueh-Ting Lee , Yao-Chi Wang , Sheng-Che Tseng
Abstract: A circuit for generating a plurality of oscillating signals with different phases includes a frequency divider, a first delay chain, a second delay chain and a calibration circuit. The frequency divider is arranged for frequency dividing a first input signal and a second input signal to generate a first frequency-divided input signal and a second frequency-divided input signal. The first delay chain is arranged for delaying the first frequency-divided input signal, and the second delay chain is arranged for delaying the second frequency-divided input signal. The calibration circuit is arranged for controlling delay amounts of the first delay chain and the second delay chain according to signals within the first delay chain or the second delay chain; wherein output signals of a portion delay cells within the first delay chain and the second delay chain serve as the plurality of oscillating signals with different phases.
-
公开(公告)号：US20180159582A1
公开(公告)日：2018-06-07
申请号：US15729404
申请日：2017-10-10
Applicant: MediaTek Inc.
Inventor： Sheng-Che Tseng , Shih-Chieh Yen , Chi-Yao Yu , Chao-Wei Wang
IPC: H04B1/44
Abstract: According to at least one aspect, a communication system is provided. The communication system includes a first switch device configured to receive a first plurality of radio frequency (RF) signals detected by an antenna array and provide an RF signal selected from among the first plurality of RF signals to a receiver circuit, the first plurality of RF signals comprising a first RF signal in a first frequency range and a second RF signal in a second frequency range that is different from the first frequency range; and a second switch device configured to receive a second plurality of RF signals detected by the antenna array and provide an RF signal selected from among the second plurality of RF signals to the receiver circuit, the second plurality of RF signals comprising a third RF signal in the first frequency range and a fourth RF signal in the second frequency range.
-
公开(公告)号：US20160118962A1
公开(公告)日：2016-04-28
申请号：US14685607
申请日：2015-04-14
Applicant: MEDIATEK INC.
Inventor： Sheng-Che Tseng , Yao-Chi Wang
CPC classification number: H03K5/06 , H03K5/1565 , H03K19/21
Abstract: A signal generating system for generating an output signal with a 50% duty cycle, comprising: a frequency dividing module, comprising an odd number of level triggering devices, for generating a plurality of frequency divided signals utilizing a frequency dividing ratio equaling to M, wherein the M is an positive integer; and a signal combining module, for combining at least two of the frequency divided signals to generate at least one output combined signal. The signal generating system generates the output signal based on the output combined signal. The frequency dividing module cooperates the signal combining module to provide a frequency dividing ratio equaling to N.5, wherein the N is a positive integer.
Abstract translation: 一种用于产生具有50％占空比的输出信号的信号发生系统，包括：分频模块，包括奇数级触发装置，用于利用等于M的分频比来产生多个分频信号，其中 M是正整数; 以及信号组合模块，用于组合至少两个所述分频信号以产生至少一个输出组合信号。 信号发生系统基于输出组合信号产生输出信号。 分频模块协同信号组合模块提供等于N.5的分频比，其中N是正整数。
-
-
-
-
-
-
-
-
-
Search Results
10
records
(took 0.016 seconds)
