Wideband low noise sensor amplifier circuit
    2.
    发明授权
    Wideband low noise sensor amplifier circuit 有权
    宽带低噪声传感器放大电路

    公开(公告)号:US08451063B2

    公开(公告)日:2013-05-28

    申请号:US12892988

    申请日:2010-09-29

    IPC分类号: H03F3/08

    摘要: A circuit having a sensor with a stray capacitance value. An output from the sensor is connected to the input of an amplifier while a negative capacitance circuit is electrically connected in parallel with the sensor output. The negative capacitance circuit reduces the effect of the sensor stray capacitance to provide an increased bandwidth and decreased noise on the amplifier output.

    摘要翻译: 具有具有杂散电容值的传感器的电路。 传感器的输出连接到放大器的输入端,而负电容电路与传感器输出端并联电连接。 负电容电路降低了传感器杂散电容的影响,从而提高了放大器输出端的带宽和降低的噪声。

    WIDEBAND LOW NOISE SENSOR AMPLIFIER CIRCUIT
    3.
    发明申请
    WIDEBAND LOW NOISE SENSOR AMPLIFIER CIRCUIT 有权
    宽带低噪声传感器放大器电路

    公开(公告)号:US20120075021A1

    公开(公告)日:2012-03-29

    申请号:US12892988

    申请日:2010-09-29

    IPC分类号: H03F1/00

    摘要: A circuit having a sensor with a stray capacitance value. An output from the sensor is connected to the input of an amplifier while a negative capacitance circuit is electrically connected in parallel with the sensor output. The negative capacitance circuit reduces the effect of the sensor stray capacitance to provide an increased bandwidth and decreased noise on the amplifier output.

    摘要翻译: 具有具有杂散电容值的传感器的电路。 传感器的输出连接到放大器的输入端,而负电容电路与传感器输出端并联电连接。 负电容电路降低了传感器杂散电容的影响,从而提高了放大器输出端的带宽和降低的噪声。

    Semiconductor device and testing method of semiconductor device
    5.
    发明授权
    Semiconductor device and testing method of semiconductor device 有权
    半导体器件的半导体器件和测试方法

    公开(公告)号:US07358953B2

    公开(公告)日:2008-04-15

    申请号:US10714943

    申请日:2003-11-18

    IPC分类号: G09G3/36

    摘要: A semiconductor device having a liquid crystal driving circuit is disclosed. The driving circuit includes a digital functional unit and an analog functional unit. The digital functional unit is comprised of a display controller and a display data storage RAM, while the analog functional unit is made up of a gradation voltage generating circuit and a gradation voltage selecting circuit. The digital and analog function units are functionally divided from each other and testing of the digital function and testing of the analog function unit are performed in an overlapping manner independently from each other.

    摘要翻译: 公开了一种具有液晶驱动电路的半导体器件。 驱动电路包括数字功能单元和模拟功能单元。 数字功能单元包括显示控制器和显示数据存储RAM,而模拟功能单元由灰度电压产生电路和灰度电压选择电路组成。 数字和模拟功能单元在功能上彼此划分,并且以彼此独立的重叠方式执行数字功能的测试和模拟功能单元的测试。

    Semiconductor device and testing method thereof
    6.
    发明申请
    Semiconductor device and testing method thereof 失效
    半导体器件及其测试方法

    公开(公告)号:US20050122300A1

    公开(公告)日:2005-06-09

    申请号:US10981715

    申请日:2004-11-05

    CPC分类号: G09G3/006 G09G3/3688

    摘要: A semiconductor device according to the present invention has a liquid crystal driver circuit, and when gray-scale voltage thereof is tested, the gray-scale voltage (Vx) generated in a gray-scale voltage generator circuit provided therein is compared with reference voltage (e.g., Vx+ΔV) generated for testing the gray-scale voltage and the test result is output as binarized voltage from external terminals of the semiconductor device. This can speed up the gray-scale voltage test even in the case of higher gray scale in the liquid crystal driver circuit or increased number of output terminals of the semiconductor device. Therefore, it becomes possible to reduce the time and cost required for the test.

    摘要翻译: 根据本发明的半导体器件具有液晶驱动电路,并且当其灰度电压被测试时,在其中提供的灰度级电压发生器电路中产生的灰度电压(Vx)与参考电压( 例如,用于测试灰度电压而生成的Vx + DeltaV)和测试结果作为来自半导体器件的外部端子的二值化电压输出。 即使在液晶驱动电路中较高的灰度级或半导体器件的输出端数量增加的情况下,也可以加快灰度电压测试。 因此,可以减少测试所需的时间和成本。

    Driver Integrated Circuit
    8.
    发明申请
    Driver Integrated Circuit 有权
    驱动器集成电路

    公开(公告)号:US20140125398A1

    公开(公告)日:2014-05-08

    申请号:US14122623

    申请日:2012-05-24

    IPC分类号: H03K19/0175

    摘要: Provided is a configuration of a driver integrated circuit that can output a voltage exceeding the withstand voltage of a process, and that satisfies required apparatus performance (high speed and high voltage). A differential input circuit, a level shift circuit, and an output circuit are manufactured by the same process and divided and disposed on three or more chips with different substrate potentials (sub-potentials). By setting different applied voltages to the substrates of the chips, an output voltage greater than the process withstand voltage can be provided (see FIG. 2).

    摘要翻译: 提供可以输出超过工艺耐压的电压并满足所需设备性能(高速和高电压)的驱动器集成电路的结构。 差分输入电路,电平移位电路和输出电路通过相同的工艺制造并且被分配和布置在具有不同衬底电位(子电位)的三个或更多个芯片上。 通过对芯片的基板设置不同的施加电压,可以提供大于工艺耐受电压的输出电压(参见图2)。

    Semiconductor device and testing method thereof
    9.
    发明授权
    Semiconductor device and testing method thereof 失效
    半导体器件及其测试方法

    公开(公告)号:US07474290B2

    公开(公告)日:2009-01-06

    申请号:US10981715

    申请日:2004-11-05

    IPC分类号: G09G3/36

    CPC分类号: G09G3/006 G09G3/3688

    摘要: A semiconductor device according to the present invention has a liquid crystal driver circuit, and when gray-scale voltage thereof is tested, the gray-scale voltage (Vx) generated in a gray-scale voltage generator circuit provided therein is compared with reference voltage (e.g., Vx+ΔV) generated for testing the gray-scale voltage and the test result is output as binarized voltage from external terminals of the semiconductor device. This can speed up the gray-scale voltage test even in the case of higher gray scale in the liquid crystal driver circuit or increased number of output terminals of the semiconductor device. Therefore, it becomes possible to reduce the time and cost required for the test.

    摘要翻译: 根据本发明的半导体器件具有液晶驱动电路,并且当其灰度电压被测试时,在其中提供的灰度级电压发生器电路中产生的灰度电压(Vx)与参考电压( 例如,用于测试灰度电压而生成的Vx + DeltaV)和测试结果作为来自半导体器件的外部端子的二值化电压输出。 即使在液晶驱动电路中较高的灰度级或半导体器件的输出端数量增加的情况下,也可以加快灰度电压测试。 因此,可以减少测试所需的时间和成本。

    Semiconductor device and the method of testing the same
    10.
    发明授权
    Semiconductor device and the method of testing the same 有权
    半导体器件及其测试方法相同

    公开(公告)号:US07443373B2

    公开(公告)日:2008-10-28

    申请号:US11002143

    申请日:2004-12-03

    IPC分类号: G09G3/36

    摘要: A problem, which one of the inventions included in the present application solves, is to provide a semiconductor device that can simultaneously test a plurality of output pins by less channels of a semiconductor test equipment in number than the integrated output pins of the semiconductor device. Representative one of the inventions has such a configuration that an LCD driver, which is the semiconductor device having a function of driving a gate line of a liquid crystal display panel, comprises: an exclusive-OR circuit for inverting polarities of positive and negative voltages for driving the gate line; a tri-state type inverter circuit capable of changing and controlling, to a high-impedance state, an output circuit for driving the gate line; and at least one of test control terminals TEST for controlling the exclusive-OR circuit and the tri-state type inverter circuit. When a test is conducted, only one terminal of the gate output outputs a positive voltage VGH or negative voltage VGL and the other terminal is set to a high-impedance state, whereby the plurality of gate outputs are simultaneously tested.

    摘要翻译: 包括在本申请中的发明中的一个解决的问题是提供一种半导体器件,其可以通过半导体测试设备的数量少于半导体器件的集成输出引脚的较少通道同时测试多个输出引脚。 代表性的发明之一具有这样的结构,即作为具有驱动液晶显示面板的栅极线的功能的半导体器件的LCD驱动器包括:用于将正和负电压的极性反转的异或电路, 驾驶门线; 能够改变和控制高阻抗状态的用于驱动栅极线的输出电路的三态逆变器电路; 以及用于控制异或电路和三态逆变器电路的测试控制端子TEST中的至少一个。 当进行测试时,仅栅极输出的一个端子输出正电压VGH或负电压VGL,另一个端子被设置为高阻抗状态,从而同时测试多个栅极输出。