公开(公告)号：US06875643B2

公开(公告)日：2005-04-05

申请号：US10740566

申请日：2003-12-22

申请人： Masanori Akatsuka ,  Naoshi Adachi

发明人： Masanori Akatsuka ,  Naoshi Adachi

IPC分类号： H01L21/76 ,  H01L21/00 ,  H01L21/02 ,  H01L21/265 ,  H01L21/762 ,  H01L21/84 ,  H01L27/01 ,  H01L27/12

CPC分类号： H01L21/76243 ,  H01L21/84

摘要： An SOI substrate having a partial SOI structure in which a buried insulating film having a predetermined area is formed via an active layer in a part of a silicon single crystal substrate in plan view by ion-implanting elements to the part of the substrate and then applying thereto a thermal processing, wherein a thickness of a peripheral edge portion of said buried insulating film is getting thinner toward a terminal edge of said buried insulating film.

摘要翻译： 具有部分SOI结构的SOI衬底，其中通过在平面图中的硅单晶衬底的一部分中的有源层通过离子注入元件到衬底的一部分然后施加具有预定面积的埋入绝缘膜， 进行热处理，其中所述掩埋绝缘膜的周边部分的厚度朝向所述掩埋绝缘膜的末端边缘变薄。

公开(公告)号：US20050158921A1

公开(公告)日：2005-07-21

申请号：US11059461

申请日：2005-02-16

申请人： Masanori Akatsuka ,  Naoshi Adachi

发明人： Masanori Akatsuka ,  Naoshi Adachi

IPC分类号： H01L21/76 ,  H01L21/00 ,  H01L21/02 ,  H01L21/265 ,  H01L21/762 ,  H01L21/84 ,  H01L27/01 ,  H01L27/12

CPC分类号： H01L21/76243 ,  H01L21/84

摘要： An SOI substrate having a partial SOI structure in which a buried insulating film having a predetermined area is formed via an active layer in a part of a silicon single crystal substrate in plan view by ion-implanting elements to the part of the substrate and then applying thereto a thermal processing, wherein a thickness of a peripheral edge portion of said buried insulating film is getting thinner toward a terminal edge of said buried insulating film.

摘要翻译： 具有部分SOI结构的SOI衬底，其中通过在平面图中的硅单晶衬底的一部分中的有源层通过离子注入元件到衬底的一部分然后施加具有预定面积的埋入绝缘膜， 进行热处理，其中所述掩埋绝缘膜的周边部分的厚度朝向所述掩埋绝缘膜的末端边缘变薄。

公开(公告)号：US20080044669A1

公开(公告)日：2008-02-21

申请号：US11597798

申请日：2005-05-19

申请人： Naoshi Adachi

发明人： Naoshi Adachi

IPC分类号： B32B9/00 ,  B32B7/00 ,  C23C14/48

CPC分类号： H01L21/76243 ,  H01L21/3225

摘要： It is possible to efficiently capture heavy metal contamination due to ion implantation or high-temperature heat treatment in a bulk layer. It is characterized that the present method comprises: a step of implanting oxygen ions into a wafer 11; a step of applying first heat treatment to a wafer under a predetermined gas atmosphere at 1,300 to 1,390° C. and forming a buried oxide layer 12 and an SOI layer 13 by applying first heat treatment to a wafer at 1,300 to 1390° C.; a second heat treatment step in which a wafer before oxygen ions are implanted has an oxygen concentration of 9×1017 to 1.8×1018 atoms/cm3 (old ASTM) and a buried oxide layer is formed entirely or locally in the wafer to form oxygen precipitate nuclei 14b formed in the wafer before the oxygen ion implantation step or between the oxygen ion implantation step and the first heat treatment step; and a third heat treatment step of growing oxygen precipitate nuclei 14b formed in the wafer so as to be oxygen precipitates 14c.

摘要翻译： 可以有效地捕获在体层中由于离子注入或高温热处理引起的重金属污染。 其特征在于，本方法包括：将氧离子注入晶片11的步骤; 在1300〜1390℃下，在规定的气体气氛下对晶片进行第一次热处理，在1300〜1390℃下对晶片进行第一次热处理，形成掩埋氧化物层12和SOI层13的工序。 注入氧离子之前的晶片的第二热处理步骤的氧浓度为9×10 17至18×10 18原子/ cm 3 （旧ASTM）和掩埋氧化物层在晶片中完全或局部地形成，以在氧离子注入步骤之前或在氧离子注入步骤和第一热处理步骤之间形成在晶片中形成的氧沉淀核14b; 以及第三热处理步骤，其在所述晶片中形成氧沉淀核14b，以形成氧析出物14c。

公开(公告)号：US20050170307A1

公开(公告)日：2005-08-04

申请号：US10771225

申请日：2004-02-02

申请人： Naoshi Adachi

发明人： Naoshi Adachi

IPC分类号： F27D5/00 ,  H01L21/677 ,  H01L21/687

CPC分类号： H01L21/6875 ,  F27D5/0037 ,  H01L21/67748

摘要： This invention provides a heat treatment jig for semiconductor silicon substrates, which, in respective heat treatment of hydrogen annealing or argon annealing, can handle enlargement of the diameter of wafers to be treated and can also prevent slipping and dislocations that occur as a result of the stress caused by the weight of the wafer itself or the deflection of the heat treatment jig itself.

摘要翻译： 本发明提供了一种用于半导体硅基板的热处理夹具，其在氢退火或氩退火的各自热处理中可以处理待处理的晶片的直径的扩大，并且还可以防止由于所述待处理而导致的滑动和位错 由晶片本身的重量或热处理夹具本身的挠曲引起的应力。

公开(公告)号：US08568537B2

公开(公告)日：2013-10-29

申请号：US13215031

申请日：2011-08-22

申请人： Naoshi Adachi ,  Tamio Motoyama

发明人： Naoshi Adachi ,  Tamio Motoyama

IPC分类号： H01L21/322 ,  H01L21/02 ,  C30B25/02 ,  C30B25/18 ,  C30B29/06

CPC分类号： H01L21/3221 ,  C30B25/02 ,  C30B25/18 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02505 ,  H01L21/02532

摘要： An epitaxial wafer comprises a silicon substrate, a gettering epitaxial film formed thereon and containing silicon and carbon, and a main silicon epitaxial film formed on the gettering epitaxial film, in which the gettering epitaxial film has a given carbon atom concentration and carbon atoms are existent between its silicon lattices.

摘要翻译： 外延晶片包括硅基板，形成在其上并含有硅和碳的吸杂外延膜，以及形成在吸杂外延膜上的主硅外延膜，其中吸杂外延膜具有给定的碳原子浓度和碳原子存在 在它的硅晶格之间。

公开(公告)号：US07442038B2

公开(公告)日：2008-10-28

申请号：US11463993

申请日：2006-08-11

申请人： Naoshi Adachi

发明人： Naoshi Adachi

IPC分类号： F27D5/00

CPC分类号： H01L21/6875 ,  F27D5/0037 ,  H01L21/67748

摘要： This invention provides a heat treatment jig for semiconductor silicon substrates, which, in respective heat treatment of hydrogen annealing or argon annealing, can handle enlargement of the diameter of wafers to be treated and can also prevent slipping and dislocations that occur as a result of the stress caused by the weight of the wafer itself or the deflection of the heat treatment jig itself.

摘要翻译： 本发明提供了一种用于半导体硅基板的热处理夹具，其在氢退火或氩退火的各自热处理中可以处理待处理的晶片的直径的扩大，并且还可以防止由于所述待处理而导致的滑动和位错 由晶片本身的重量或热处理夹具本身的挠曲引起的应力。

公开(公告)号：US20080090384A1

公开(公告)日：2008-04-17

申请号：US11632875

申请日：2005-07-19

申请人： Naoshi Adachi ,  Yukio Komatsu

发明人： Naoshi Adachi ,  Yukio Komatsu

IPC分类号： H01L21/322

CPC分类号： H01L21/76243 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02299 ,  H01L21/26533 ,  H01L21/31662

摘要： A manufacturing method for a SIMOX substrate for obtaining a SIMOX substrate by subjecting a silicon substrate having oxygen ions implanted thereinto by heat treatment at 1300 to 1350° C. in an atmosphere of a gas mixture of argon and oxygen, the method includes: performing a pre-heat-treatment to the silicon substrate for five minutes to four hours within the temperature range of 1000° C. to 1280° C. in an atmosphere of inert gas, reducing gas, or a gas mixture of inert gas and reducing gas, after the oxygen ions are implanted and before the heat treatment is performed.

摘要翻译： 一种SIMOX基板的制造方法，其特征在于，在氩气和氧气的气体混合气体中，通过在1300〜1350℃下进行热处理，对其中含有氧离子的硅基板进行了处理，从而获得SIMOX基板，该方法包括： 在惰性气体，还原气体或惰性气体与还原气体的气体混合气体中，在1000℃〜1280℃的温度范围内，对硅基板进行预热处理5分钟〜4小时， 在氧离子植入之后并且在进行热处理之前。

公开(公告)号：US07163393B2

公开(公告)日：2007-01-16

申请号：US10771225

申请日：2004-02-02

申请人： Naoshi Adachi

发明人： Naoshi Adachi

IPC分类号： F27D5/00

CPC分类号： H01L21/6875 ,  F27D5/0037 ,  H01L21/67748

摘要： This invention provides a heat treatment jig for semiconductor silicon substrates, which, in respective heat treatment of hydrogen annealing or argon annealing, can handle enlargement of the diameter of wafers to be treated and can also prevent slipping and dislocations that occur as a result of the stress caused by the weight of the wafer itself or the deflection of the heat treatment jig itself.

摘要翻译： 本发明提供了一种用于半导体硅基板的热处理夹具，其在氢退火或氩退火的各自热处理中可以处理待处理的晶片的直径的扩大，并且还可以防止由于所述待处理而导致的滑动和位错 由晶片本身的重量或热处理夹具本身的挠曲引起的应力。

公开(公告)号：US20050081958A1

公开(公告)日：2005-04-21

申请号：US10501522

申请日：2003-10-22

申请人： Naoshi Adachi ,  Masahiko Nakamae

发明人： Naoshi Adachi ,  Masahiko Nakamae

IPC分类号： H01L21/02 ,  H01L21/336 ,  H01L21/762 ,  H01L21/764 ,  H01L27/12 ,  H01L29/786 ,  H01L21/30

CPC分类号： H01L21/764 ,  H01L21/76251 ,  H01L21/76254

摘要： A plurality of recessed portions having different depths is formed in a surface of the active layer wafer or in a bonding surface of the supporting substrate wafer. Those wafers are bonded to each other with an insulation film interposed therebetween. This allows a cavity of higher dimensional precision to be buried therein. A plurality of cavities may be formed simultaneously in a plurality of locations within the plane of the substrate, which allows the thickness of the SOI layer to be set arbitrarily. Accordingly, such a semiconductor device can be fabricated easily in which a MOS type element and a bipolar element are formed on the same chip in a mixed manner.

摘要翻译： 在有源层晶片的表面或支撑衬底晶片的接合表面上形成具有不同深度的多个凹部。 这些晶片通过绝缘膜彼此接合。 这允许将较高尺寸精度的腔埋入其中。 可以在衬底的平面内的多个位置中同时形成多个空腔，这允许SOI层的厚度任意设定。 因此，可以容易地制造这样的半导体器件，其中在相同的芯片上以混合的方式形成MOS型元件和双极元件。

公开(公告)号：US08105078B2

公开(公告)日：2012-01-31

申请号：US11702591

申请日：2007-02-06

申请人： Naoshi Adachi

发明人： Naoshi Adachi

IPC分类号： C23C16/04

CPC分类号： F27D5/0037 ,  C04B2235/9623 ,  H01L21/67306 ,  H01L21/67309

摘要： A heat treatment jig for semiconductor silicon substrates is configured such that a cristobalitized oxide film is formed in a region where the cristobalitized oxide film is in contact with a silicon substrate backside. When said heat treatment jig is used, generation of a slip can be prevented during heat treatment. In the case where the heat treatment jig is used in combination with a shielding plate, particles are further prevented from adhering to the silicon substrate surface to maintain quality characteristics of the semiconductor silicon substrate at a higher level, and device production yield can largely be improved. The heat treatment jig can easily be manufactured by introducing a cristobalitization promoting agent to a surface or in the vicinity of a surface of the heat treatment jig, performing the heat treatment at temperatures in the range of 1000 to 1380° C., and repeating the introduction of the cristobalitization promoting agent and the heat treatment.

摘要翻译： 用于半导体硅衬底的热处理夹具被构造成使得在刻蚀的氧化膜与硅衬底背面接触的区域中形成刻板化的氧化物膜。 当使用所述热处理夹具时，可以在热处理期间防止产生滑动。 在将热处理夹具与屏蔽板组合使用的情况下，进一步防止了粒子附着在硅衬底表面上，从而将半导体硅衬底的质量特性保持在更高的水平，并且能够大幅提高器件的制造成品率 。 热处理夹具可以容易地通过向热处理夹具的表面或表面附近引入澄清促进剂，在1000〜1380℃的温度范围内进行热处理，并重复 引入明显促进剂和热处理。