公开(公告)号：US20170287821A1

公开(公告)日：2017-10-05

申请号：US15244846

申请日：2016-08-23

申请人： Magnachip Semiconductor, Ltd.

发明人： Jae Sik CHOI ,  Si Hyeon GO ,  Jun Young HEO ,  Moon Taek SUNG ,  Dong Seong OH

IPC分类号： H01L23/495 ,  H01L21/48 ,  H01L23/373 ,  H01L25/18 ,  H01L23/00

CPC分类号： H01L23/49575 ,  H01L21/4875 ,  H01L23/3735 ,  H01L23/49531 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49562 ,  H01L24/14 ,  H01L24/48 ,  H01L24/85 ,  H01L25/18 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2224/45099

摘要： A power semiconductor module includes: a substrate including first, second, and third metal patterns separated from each other, a semiconductor element located on the substrate, a lead frame located on the substrate and including first, second, third, and fourth bodies; a first terminal connected to the first body, a second terminal connected to the second body, and a third common terminal that connects the third body and the fourth body, wherein a length of the third common terminal is longer than that of the first and second terminals.

公开(公告)号：US20180233424A1

公开(公告)日：2018-08-16

申请号：US15869443

申请日：2018-01-12

申请人： Magnachip Semiconductor, Ltd.

发明人： Moon Taek SUNG ,  Jae Sik CHOI

IPC分类号： H01L23/31 ,  H01L23/00 ,  H01L23/36 ,  H01L23/495

CPC分类号： H01L23/3107 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/49524 ,  H01L23/49531 ,  H01L23/49548 ,  H01L23/49551 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/13111 ,  H01L2224/1329 ,  H01L2224/13339 ,  H01L2224/16225 ,  H01L2224/29111 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/0665 ,  H01L2924/00012

摘要： A semiconductor package device includes a lead frame including a lead frame pad and lead frame leads, a semiconductor chip located on the lead frame pad, and a substrate located on the semiconductor chip, wherein the lead frame leads include first lead frame leads coupled to the lead frame pad and second lead frame leads separated from the lead frame pad and attached to a bottom surface of the substrate.