公开(公告)号：US20190237544A1

公开(公告)日：2019-08-01

申请号：US15961322

申请日：2018-04-24

申请人： Magnachip Semiconductor, Ltd.

发明人： Seong Jo HONG ,  Soo Chang KANG ,  Ha Yong YANG ,  Young Ho SEO

IPC分类号： H01L29/08 ,  H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L21/266

摘要： A method for manufacturing a power semiconductor device includes forming a trench in a semiconductor substrate, forming a gate insulation film and a gate electrode in the trench, implanting a first conductivity type impurity into the semiconductor substrate to form a first conductivity type body region, implanting a second conductivity type impurity onto a surface of the semiconductor substrate to form a second conductivity type source region, forming an interlayer insulation film in the trench, implanting the first conductivity type impurity onto the surface of the semiconductor substrate to form a first conductivity type highly doped body contact region, exposing a portion of a side surface of the trench, and forming a source metal to be in contact with the exposed side surface of the trench.

公开(公告)号：US20190207005A1

公开(公告)日：2019-07-04

申请号：US16294338

申请日：2019-03-06

申请人： MagnaChip Semiconductor, Ltd.

发明人： Myung Ho PARK ,  Ul Kyu SEO ,  Young Ho SEO ,  Jae Sik CHOI

IPC分类号： H01L29/417 ,  H01L23/535 ,  H01L29/40 ,  H01L29/78 ,  H01L23/00

CPC分类号： H01L29/41741 ,  H01L23/535 ,  H01L24/05 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/7809 ,  H01L29/7813 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05025 ,  H01L2224/05093

摘要： The description relates to a semiconductor die having a stacking structure of silicon-metallic conductive layer-silicon, and the semiconductor die according to embodiments includes a stacking structure of first semiconductor layer-metallic conductive layer-second semiconductor layer, and first and second power semiconductor devices in the first semiconductor layer, in which the first power semiconductor device includes a first source bump and a first gate bump, first trench gate electrodes under the first source bump, and a first channel among the plurality of first trench gate electrodes, in which the second power semiconductor device includes a second source bump and a second gate bump, second trench gate electrodes under the second source bump, and a second channel among the plurality of second trench gate electrodes, and in which the metallic conductive layer includes a metal layer.

公开(公告)号：US20190019871A1

公开(公告)日：2019-01-17

申请号：US15901235

申请日：2018-02-21

申请人： MagnaChip Semiconductor, Ltd.

发明人： Myung Ho PARK ,  Ul Kyu SEO ,  Young Ho SEO ,  Jae Sik CHOI

IPC分类号： H01L29/417 ,  H01L23/00 ,  H01L29/40 ,  H01L29/78 ,  H01L23/535

摘要： The description relates to a semiconductor die having a stacking structure of silicon-metallic conductive layer-silicon, and the semiconductor die according to embodiments includes a stacking structure of first semiconductor layer-metallic conductive layer-second semiconductor layer, and first and second power semiconductor devices in the first semiconductor layer, in which the first power semiconductor device includes a first source bump and a first gate bump, first trench gate electrodes under the first source bump, and a first channel among the plurality of first trench gate electrodes, in which the second power semiconductor device includes a second source bump and a second gate bump, second trench gate electrodes under the second source bump, and a second channel among the plurality of second trench gate electrodes, and in which the metallic conductive layer includes a metal layer.